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constant-riscv-v.h
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1// Copyright 2022 the V8 project authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#ifndef V8_CODEGEN_RISCV_CONSTANT_RISCV_V_H_
6#define V8_CODEGEN_RISCV_CONSTANT_RISCV_V_H_
7
9namespace v8 {
10namespace internal {
11
12// RVV Extension
13constexpr Opcode OP_IVV = OP_V | (0b000 << kFunct3Shift);
14constexpr Opcode OP_FVV = OP_V | (0b001 << kFunct3Shift);
15constexpr Opcode OP_MVV = OP_V | (0b010 << kFunct3Shift);
16constexpr Opcode OP_IVI = OP_V | (0b011 << kFunct3Shift);
17constexpr Opcode OP_IVX = OP_V | (0b100 << kFunct3Shift);
18constexpr Opcode OP_FVF = OP_V | (0b101 << kFunct3Shift);
19constexpr Opcode OP_MVX = OP_V | (0b110 << kFunct3Shift);
20
21constexpr Opcode RO_V_VSETVLI = OP_V | (0b111 << kFunct3Shift) | 0b0 << 31;
22constexpr Opcode RO_V_VSETIVLI = OP_V | (0b111 << kFunct3Shift) | 0b11 << 30;
23constexpr Opcode RO_V_VSETVL = OP_V | (0b111 << kFunct3Shift) | 0b1 << 31;
24
25// RVV LOAD/STORE
26constexpr Opcode RO_V_VL =
27 LOAD_FP | (0b00 << kRvvMopShift) | (0b000 << kRvvNfShift);
28constexpr Opcode RO_V_VLS =
29 LOAD_FP | (0b10 << kRvvMopShift) | (0b000 << kRvvNfShift);
30constexpr Opcode RO_V_VLX =
31 LOAD_FP | (0b11 << kRvvMopShift) | (0b000 << kRvvNfShift);
32
33constexpr Opcode RO_V_VS =
34 STORE_FP | (0b00 << kRvvMopShift) | (0b000 << kRvvNfShift);
35constexpr Opcode RO_V_VSS =
36 STORE_FP | (0b10 << kRvvMopShift) | (0b000 << kRvvNfShift);
37constexpr Opcode RO_V_VSX =
38 STORE_FP | (0b11 << kRvvMopShift) | (0b000 << kRvvNfShift);
39constexpr Opcode RO_V_VSU =
40 STORE_FP | (0b01 << kRvvMopShift) | (0b000 << kRvvNfShift);
41// THE kFunct6Shift is mop
43 LOAD_FP | (0b00 << kRvvMopShift) | (0b001 << kRvvNfShift);
45 LOAD_FP | (0b00 << kRvvMopShift) | (0b010 << kRvvNfShift);
47 LOAD_FP | (0b00 << kRvvMopShift) | (0b011 << kRvvNfShift);
49 LOAD_FP | (0b00 << kRvvMopShift) | (0b100 << kRvvNfShift);
51 LOAD_FP | (0b00 << kRvvMopShift) | (0b101 << kRvvNfShift);
53 LOAD_FP | (0b00 << kRvvMopShift) | (0b110 << kRvvNfShift);
55 LOAD_FP | (0b00 << kRvvMopShift) | (0b111 << kRvvNfShift);
56
58 STORE_FP | (0b00 << kRvvMopShift) | (0b001 << kRvvNfShift);
60 STORE_FP | (0b00 << kRvvMopShift) | (0b010 << kRvvNfShift);
62 STORE_FP | (0b00 << kRvvMopShift) | (0b011 << kRvvNfShift);
64 STORE_FP | (0b00 << kRvvMopShift) | (0b100 << kRvvNfShift);
66 STORE_FP | (0b00 << kRvvMopShift) | (0b101 << kRvvNfShift);
68 STORE_FP | (0b00 << kRvvMopShift) | (0b110 << kRvvNfShift);
70 STORE_FP | (0b00 << kRvvMopShift) | (0b111 << kRvvNfShift);
71
73 LOAD_FP | (0b10 << kRvvMopShift) | (0b001 << kRvvNfShift);
75 LOAD_FP | (0b10 << kRvvMopShift) | (0b010 << kRvvNfShift);
77 LOAD_FP | (0b10 << kRvvMopShift) | (0b011 << kRvvNfShift);
79 LOAD_FP | (0b10 << kRvvMopShift) | (0b100 << kRvvNfShift);
81 LOAD_FP | (0b10 << kRvvMopShift) | (0b101 << kRvvNfShift);
83 LOAD_FP | (0b10 << kRvvMopShift) | (0b110 << kRvvNfShift);
85 LOAD_FP | (0b10 << kRvvMopShift) | (0b111 << kRvvNfShift);
86
88 STORE_FP | (0b10 << kRvvMopShift) | (0b001 << kRvvNfShift);
90 STORE_FP | (0b10 << kRvvMopShift) | (0b010 << kRvvNfShift);
92 STORE_FP | (0b10 << kRvvMopShift) | (0b011 << kRvvNfShift);
94 STORE_FP | (0b10 << kRvvMopShift) | (0b100 << kRvvNfShift);
96 STORE_FP | (0b10 << kRvvMopShift) | (0b101 << kRvvNfShift);
98 STORE_FP | (0b10 << kRvvMopShift) | (0b110 << kRvvNfShift);
100 STORE_FP | (0b10 << kRvvMopShift) | (0b111 << kRvvNfShift);
101
103 LOAD_FP | (0b11 << kRvvMopShift) | (0b001 << kRvvNfShift);
105 LOAD_FP | (0b11 << kRvvMopShift) | (0b010 << kRvvNfShift);
107 LOAD_FP | (0b11 << kRvvMopShift) | (0b011 << kRvvNfShift);
109 LOAD_FP | (0b11 << kRvvMopShift) | (0b100 << kRvvNfShift);
111 LOAD_FP | (0b11 << kRvvMopShift) | (0b101 << kRvvNfShift);
113 LOAD_FP | (0b11 << kRvvMopShift) | (0b110 << kRvvNfShift);
115 LOAD_FP | (0b11 << kRvvMopShift) | (0b111 << kRvvNfShift);
116
118 STORE_FP | (0b11 << kRvvMopShift) | (0b001 << kRvvNfShift);
120 STORE_FP | (0b11 << kRvvMopShift) | (0b010 << kRvvNfShift);
122 STORE_FP | (0b11 << kRvvMopShift) | (0b011 << kRvvNfShift);
124 STORE_FP | (0b11 << kRvvMopShift) | (0b100 << kRvvNfShift);
126 STORE_FP | (0b11 << kRvvMopShift) | (0b101 << kRvvNfShift);
128 STORE_FP | (0b11 << kRvvMopShift) | (0b110 << kRvvNfShift);
130 STORE_FP | (0b11 << kRvvMopShift) | (0b111 << kRvvNfShift);
131
132// RVV Vector Arithmetic Instruction
133constexpr Opcode VADD_FUNCT6 = 0b000000;
137
138constexpr Opcode VSUB_FUNCT6 = 0b000010;
141
142constexpr Opcode VDIVU_FUNCT6 = 0b100000;
145
146constexpr Opcode VDIV_FUNCT6 = 0b100001;
149
150constexpr Opcode VREMU_FUNCT6 = 0b100010;
153
154constexpr Opcode VREM_FUNCT6 = 0b100011;
157
158constexpr Opcode VMULHU_FUNCT6 = 0b100100;
161
162constexpr Opcode VMUL_FUNCT6 = 0b100101;
165
166constexpr Opcode VWMUL_FUNCT6 = 0b111011;
169
170constexpr Opcode VWMULU_FUNCT6 = 0b111000;
173
174constexpr Opcode VMULHSU_FUNCT6 = 0b100110;
177
178constexpr Opcode VMULH_FUNCT6 = 0b100111;
181
182constexpr Opcode VWADD_FUNCT6 = 0b110001;
185
186constexpr Opcode VWADDU_FUNCT6 = 0b110000;
189
190constexpr Opcode VWADDUW_FUNCT6 = 0b110101;
193
194constexpr Opcode VCOMPRESS_FUNCT6 = 0b010111;
197
198constexpr Opcode VSADDU_FUNCT6 = 0b100000;
202
203constexpr Opcode VSADD_FUNCT6 = 0b100001;
207
208constexpr Opcode VSSUB_FUNCT6 = 0b100011;
211
212constexpr Opcode VSSUBU_FUNCT6 = 0b100010;
215
216constexpr Opcode VRSUB_FUNCT6 = 0b000011;
219
220constexpr Opcode VMINU_FUNCT6 = 0b000100;
223
224constexpr Opcode VMIN_FUNCT6 = 0b000101;
227
228constexpr Opcode VMAXU_FUNCT6 = 0b000110;
231
232constexpr Opcode VMAX_FUNCT6 = 0b000111;
235
236constexpr Opcode VAND_FUNCT6 = 0b001001;
240
241constexpr Opcode VOR_FUNCT6 = 0b001010;
245
246constexpr Opcode VXOR_FUNCT6 = 0b001011;
250
251constexpr Opcode VRGATHER_FUNCT6 = 0b001100;
258
259constexpr Opcode VMV_FUNCT6 = 0b010111;
264
269
270constexpr Opcode VMSEQ_FUNCT6 = 0b011000;
274
275constexpr Opcode VMSNE_FUNCT6 = 0b011001;
279
280constexpr Opcode VMSLTU_FUNCT6 = 0b011010;
283
284constexpr Opcode VMSLT_FUNCT6 = 0b011011;
287
288constexpr Opcode VMSLE_FUNCT6 = 0b011101;
292
293constexpr Opcode VMSLEU_FUNCT6 = 0b011100;
297
298constexpr Opcode VMSGTU_FUNCT6 = 0b011110;
301
302constexpr Opcode VMSGT_FUNCT6 = 0b011111;
305
306constexpr Opcode VSLIDEUP_FUNCT6 = 0b001110;
315
316constexpr Opcode VSLIDEDOWN_FUNCT6 = 0b001111;
325
326constexpr Opcode VSRL_FUNCT6 = 0b101000;
330
331constexpr Opcode VSRA_FUNCT6 = 0b101001;
335
336constexpr Opcode VSLL_FUNCT6 = 0b100101;
340
341constexpr Opcode VSMUL_FUNCT6 = 0b100111;
344
345constexpr Opcode VADC_FUNCT6 = 0b010000;
349
350constexpr Opcode VMADC_FUNCT6 = 0b010001;
354
355constexpr Opcode VWXUNARY0_FUNCT6 = 0b010000;
356constexpr Opcode VRXUNARY0_FUNCT6 = 0b010000;
357constexpr Opcode VMUNARY0_FUNCT6 = 0b010100;
358
364
365constexpr Opcode VID_V = 0b10001;
366
367constexpr Opcode VXUNARY0_FUNCT6 = 0b010010;
369
370constexpr Opcode VWFUNARY0_FUNCT6 = 0b010000;
372
373constexpr Opcode VRFUNARY0_FUNCT6 = 0b010000;
375
376constexpr Opcode VREDMAXU_FUNCT6 = 0b000110;
378constexpr Opcode VREDMAX_FUNCT6 = 0b000111;
380
381constexpr Opcode VREDMINU_FUNCT6 = 0b000100;
383constexpr Opcode VREDMIN_FUNCT6 = 0b000101;
385
386constexpr Opcode VFUNARY0_FUNCT6 = 0b010010;
388constexpr Opcode VFUNARY1_FUNCT6 = 0b010011;
390
391constexpr Opcode VFCVT_XU_F_V = 0b00000;
392constexpr Opcode VFCVT_X_F_V = 0b00001;
393constexpr Opcode VFCVT_F_XU_V = 0b00010;
394constexpr Opcode VFCVT_F_X_V = 0b00011;
395constexpr Opcode VFWCVT_XU_F_V = 0b01000;
396constexpr Opcode VFWCVT_X_F_V = 0b01001;
397constexpr Opcode VFWCVT_F_XU_V = 0b01010;
398constexpr Opcode VFWCVT_F_X_V = 0b01011;
399constexpr Opcode VFWCVT_F_F_V = 0b01100;
400constexpr Opcode VFNCVT_F_F_W = 0b10100;
401constexpr Opcode VFNCVT_X_F_W = 0b10001;
402constexpr Opcode VFNCVT_XU_F_W = 0b10000;
403
404constexpr Opcode VFCLASS_V = 0b10000;
405constexpr Opcode VFSQRT_V = 0b00000;
406constexpr Opcode VFRSQRT7_V = 0b00100;
407constexpr Opcode VFREC7_V = 0b00101;
408
409constexpr Opcode VFADD_FUNCT6 = 0b000000;
412
413constexpr Opcode VFSUB_FUNCT6 = 0b000010;
416
417constexpr Opcode VFDIV_FUNCT6 = 0b100000;
420
421constexpr Opcode VFMUL_FUNCT6 = 0b100100;
424
425// Vector Widening Floating-Point Add/Subtract Instructions
426constexpr Opcode VFWADD_FUNCT6 = 0b110000;
429
430constexpr Opcode VFWSUB_FUNCT6 = 0b110010;
433
434constexpr Opcode VFWADD_W_FUNCT6 = 0b110100;
439
440constexpr Opcode VFWSUB_W_FUNCT6 = 0b110110;
445
446// Vector Widening Floating-Point Reduction Instructions
447constexpr Opcode VFWREDUSUM_FUNCT6 = 0b110001;
450
451constexpr Opcode VFWREDOSUM_FUNCT6 = 0b110011;
454
455// Vector Widening Floating-Point Multiply
456constexpr Opcode VFWMUL_FUNCT6 = 0b111000;
459
460constexpr Opcode VMFEQ_FUNCT6 = 0b011000;
463
464constexpr Opcode VMFNE_FUNCT6 = 0b011100;
467
468constexpr Opcode VMFLT_FUNCT6 = 0b011011;
471
472constexpr Opcode VMFLE_FUNCT6 = 0b011001;
475
476constexpr Opcode VMFGE_FUNCT6 = 0b011111;
478
479constexpr Opcode VMFGT_FUNCT6 = 0b011101;
481
482constexpr Opcode VFMAX_FUNCT6 = 0b000110;
485
486constexpr Opcode VFREDMAX_FUNCT6 = 0b0001111;
489
490constexpr Opcode VFMIN_FUNCT6 = 0b000100;
493
494constexpr Opcode VFSGNJ_FUNCT6 = 0b001000;
497
498constexpr Opcode VFSGNJN_FUNCT6 = 0b001001;
501
502constexpr Opcode VFSGNJX_FUNCT6 = 0b001010;
505
506constexpr Opcode VFMADD_FUNCT6 = 0b101000;
509
510constexpr Opcode VFNMADD_FUNCT6 = 0b101001;
513
514constexpr Opcode VFMSUB_FUNCT6 = 0b101010;
517
518constexpr Opcode VFNMSUB_FUNCT6 = 0b101011;
521
522constexpr Opcode VFMACC_FUNCT6 = 0b101100;
525
526constexpr Opcode VFNMACC_FUNCT6 = 0b101101;
529
530constexpr Opcode VFMSAC_FUNCT6 = 0b101110;
533
534constexpr Opcode VFNMSAC_FUNCT6 = 0b101111;
537
538// Vector Widening Floating-Point Fused Multiply-Add Instructions
539constexpr Opcode VFWMACC_FUNCT6 = 0b111100;
542
543constexpr Opcode VFWNMACC_FUNCT6 = 0b111101;
548
549constexpr Opcode VFWMSAC_FUNCT6 = 0b111110;
552
553constexpr Opcode VFWNMSAC_FUNCT6 = 0b111111;
558
559constexpr Opcode VNCLIP_FUNCT6 = 0b101111;
563
564constexpr Opcode VNCLIPU_FUNCT6 = 0b101110;
568// clang-format on
569} // namespace internal
570} // namespace v8
571
572#endif // V8_CODEGEN_RISCV_CONSTANT_RISCV_V_H_
constexpr Opcode VMAXU_FUNCT6
constexpr Opcode RO_V_VSSEG4
constexpr Opcode RO_V_VNCLIP_WX
constexpr Opcode RO_V_VMERGE_VI
constexpr Opcode OP_MVV
constexpr Opcode RO_V_VFWADD_VV
constexpr Opcode RO_V_VFSLIDE1DOWN_VF
constexpr Opcode RO_V_VMSGT_VI
constexpr Opcode RO_V_VFWSUB_VF
constexpr Opcode RO_V_VSLIDEUP_VX
constexpr Opcode RO_V_VNCLIPU_WV
constexpr Opcode RO_V_VADD_VI
constexpr Opcode RO_V_VSSEG3
constexpr Opcode VFMACC_FUNCT6
constexpr Opcode RO_V_VFNMADD_VF
constexpr Opcode VMUL_FUNCT6
constexpr Opcode VMSGTU_FUNCT6
constexpr Opcode RO_V_VFNMADD_VV
constexpr Opcode RO_V_VSETIVLI
constexpr Opcode RO_V_VSSUBU_VX
constexpr Opcode RO_V_VFADD_VF
constexpr Opcode VMULHU_FUNCT6
constexpr Opcode RO_V_VLSEG6
constexpr Opcode RO_V_VNCLIP_WV
constexpr Opcode RO_V_VMULH_VV
constexpr Opcode RO_V_VMIN_VX
constexpr Opcode RO_V_VLXSEG4
constexpr Opcode VWADDU_FUNCT6
constexpr Opcode VSMUL_FUNCT6
constexpr Opcode VFMADD_FUNCT6
constexpr Opcode RO_V_VFMADD_VV
constexpr Opcode RO_V_VMULHU_VV
constexpr Opcode RO_V_VFWNMSAC_VV
constexpr Opcode RO_V_VFSGNJN_VF
constexpr Opcode RO_V_VMSLEU_VI
constexpr Opcode RO_V_VS
constexpr Opcode VFDIV_FUNCT6
constexpr Opcode RO_V_VFWMSAC_VF
constexpr Opcode RO_V_VFNMACC_VF
constexpr Opcode RO_V_VFNMSUB_VV
constexpr Opcode RO_V_VSSSEG4
constexpr Opcode RO_V_VRGATHER_VI
constexpr Opcode VFWMACC_FUNCT6
constexpr Opcode RO_V_VSRL_VI
constexpr Opcode VMFGE_FUNCT6
constexpr Opcode VREDMAXU_FUNCT6
constexpr Opcode RO_V_VMSLTU_VX
constexpr Opcode RO_V_VSSSEG5
constexpr Opcode RO_V_VREMU_VV
constexpr Opcode RO_V_VSSSEG3
constexpr Opcode RO_V_VMUL_VX
constexpr Opcode RO_V_VMULHSU_VX
constexpr Opcode RO_V_VMINU_VV
constexpr Opcode RO_V_VSLL_VX
constexpr Opcode RO_V_VSXSEG6
constexpr Opcode VMADC_FUNCT6
constexpr Opcode RO_V_VFMERGE_VF
constexpr Opcode RO_V_VLSEG5
constexpr Opcode VFRSQRT7_V
constexpr Opcode RO_V_VLSEG3
constexpr Opcode RO_V_VSSEG6
constexpr Opcode VFWCVT_F_X_V
constexpr Opcode RO_V_VFWADD_W_VF
constexpr Opcode RO_V_VREDMIN
constexpr Opcode RO_V_VSSUB_VX
constexpr Opcode RO_V_VSLIDE1UP_VX
constexpr Opcode RO_V_VFWMUL_VV
constexpr Opcode VMSLE_FUNCT6
constexpr Opcode RO_V_VMSEQ_VX
constexpr Opcode RO_V_VSX
constexpr Opcode RO_V_VSLL_VI
constexpr Opcode VWADD_FUNCT6
constexpr Opcode VFSGNJ_FUNCT6
constexpr Opcode VRSUB_FUNCT6
constexpr Opcode OP_IVX
constexpr Opcode RO_V_VMSLT_VX
constexpr Opcode VFMSUB_FUNCT6
constexpr Opcode RO_V_VSLIDEDOWN_VX
constexpr Opcode RO_V_VSXSEG8
constexpr Opcode VFSUB_FUNCT6
constexpr Opcode VMULH_FUNCT6
constexpr Opcode RO_V_VLXSEG2
constexpr Opcode RO_V_VSSEG5
constexpr Opcode VFNCVT_XU_F_W
constexpr Opcode RO_V_VDIVU_VX
constexpr Opcode RO_V_VFSUB_VF
constexpr Opcode RO_V_VFSUB_VV
constexpr Opcode RO_V_VMFLT_VF
constexpr Opcode VFUNARY1_FUNCT6
constexpr Opcode VFWSUB_W_FUNCT6
constexpr Opcode RO_V_VMFNE_VV
constexpr Opcode RO_V_VFUNARY1
constexpr Opcode RO_V_VFMACC_VF
constexpr Opcode VID_V
constexpr Opcode RO_V_VMFNE_VF
constexpr Opcode RO_V_VMSEQ_VV
constexpr Opcode RO_V_VXOR_VV
constexpr Opcode RO_V_VMSGT_VX
constexpr Opcode RO_V_VADD_VV
constexpr Opcode OP_MVX
constexpr Opcode RO_V_VL
constexpr Opcode RO_V_VFMV_FS
constexpr Opcode RO_V_VMV_VV
constexpr Opcode VXUNARY0_FUNCT6
constexpr Opcode VWMULU_FUNCT6
constexpr Opcode RO_V_VSXSEG7
constexpr Opcode VFWNMACC_FUNCT6
constexpr Opcode VSLL_FUNCT6
constexpr Opcode RO_V_VSMUL_VX
constexpr Opcode RO_V_VMULHU_VX
constexpr Opcode RO_V_VFWSUB_VV
constexpr Opcode RO_V_VFWMACC_VV
constexpr Opcode RO_V_VFMV_SF
constexpr Opcode RO_V_VNCLIPU_WX
constexpr Opcode VSSUB_FUNCT6
constexpr Opcode RO_V_VMFLT_VV
constexpr Opcode RO_V_VDIVU_VV
constexpr Opcode RO_V_VMSLEU_VX
constexpr Opcode RO_V_VFWMACC_VF
constexpr Opcode VMV_FUNCT6
constexpr Opcode VXOR_FUNCT6
constexpr Opcode RO_V_VFMSAC_VV
constexpr Opcode RO_V_VMSEQ_VI
constexpr Opcode RO_V_VMSLEU_VV
constexpr Opcode RO_V_VMUL_VV
constexpr Opcode RO_V_VMV_VI
constexpr Opcode RO_V_VSLIDEUP_VI
constexpr Opcode RO_V_VFREDMAX_VV
constexpr Opcode RO_V_VFWSUB_W_VV
constexpr Opcode VFNCVT_X_F_W
constexpr Opcode VFCVT_X_F_V
constexpr Opcode RO_V_VFMAX_VV
constexpr Opcode RO_V_VFWREDOSUM_VS
constexpr Opcode RO_V_VWMUL_VV
constexpr Opcode VFSQRT_V
constexpr Opcode VWMUL_FUNCT6
constexpr Opcode RO_V_VMADC_VV
constexpr Opcode VDIV_FUNCT6
constexpr Opcode RO_V_VXOR_VX
constexpr Opcode RO_V_VSXSEG5
constexpr Opcode VFREDMAX_FUNCT6
constexpr Opcode RO_V_VFWNMACC_VF
constexpr Opcode RO_V_VFNMSAC_VV
constexpr Opcode VMSLT_FUNCT6
constexpr Opcode RO_V_VLSEG4
constexpr Opcode RO_V_VFDIV_VF
constexpr Opcode RO_V_VFSGNJN_VV
constexpr Opcode RO_V_VMFEQ_VV
constexpr Opcode VFCLASS_V
constexpr Opcode RO_V_VSADDU_VI
constexpr Opcode VFWCVT_F_F_V
constexpr Opcode RO_V_VFMSUB_VF
constexpr Opcode RO_V_VSADDU_VX
constexpr Opcode RO_V_VFWMUL_VF
constexpr Opcode VMSNE_FUNCT6
constexpr Opcode RO_V_VMERGE_VV
constexpr Opcode VFNMADD_FUNCT6
constexpr Opcode RO_V_VSLIDE1DOWN_VX
constexpr Opcode VSADDU_FUNCT6
constexpr Opcode OP_IVI
constexpr Opcode RO_V_VSSSEG6
constexpr Opcode RO_V_VWXUNARY0
constexpr Opcode RO_V_VNCLIP_WI
constexpr Opcode VMAX_FUNCT6
constexpr Opcode VREM_FUNCT6
constexpr Opcode RO_V_VLSSEG3
constexpr Opcode RO_V_VSLIDEDOWN_VI
constexpr Opcode RO_V_VMFGT_VF
constexpr Opcode RO_V_VSXSEG4
constexpr Opcode VOR_FUNCT6
constexpr Opcode RO_V_VDIV_VV
constexpr Opcode RO_V_VMERGE_VX
constexpr Opcode RO_V_VMSLE_VV
constexpr Opcode RO_V_VMAX_VV
constexpr Opcode RO_V_VLSSEG6
constexpr Opcode RO_V_VMFLE_VV
constexpr Opcode RO_V_VMULHSU_VV
constexpr Opcode RO_V_VSETVL
constexpr Opcode VAND_FUNCT6
constexpr Opcode VMSLTU_FUNCT6
constexpr Opcode RO_V_VSADD_VX
constexpr Opcode RO_V_VFWSUB_W_VF
constexpr Opcode RO_V_VLX
constexpr Opcode RO_V_VSRL_VX
constexpr Opcode RO_V_VADD_VX
constexpr Opcode VFWNMSAC_FUNCT6
constexpr Opcode RO_V_VMIN_VV
constexpr Opcode VMFEQ_FUNCT6
constexpr Opcode RO_V_VLSEG7
constexpr Opcode RO_V_VSUB_VX
constexpr Opcode RO_V_VWMUL_VX
constexpr Opcode RO_V_VXOR_VI
constexpr Opcode RO_V_VFSGNJX_VF
constexpr Opcode RO_V_VLSSEG7
constexpr Opcode VREDMAX_FUNCT6
constexpr Opcode VFMSAC_FUNCT6
constexpr Opcode VFADD_FUNCT6
constexpr Opcode VCOMPRESS_FUNCT6
constexpr Opcode RO_V_VMSLE_VX
constexpr Opcode VADC_FUNCT6
constexpr Opcode RO_V_VWADDUW_VV
constexpr Opcode RO_V_VRSUB_VX
constexpr Opcode VREDMINU_FUNCT6
constexpr Opcode RO_V_VLSSEG2
constexpr Opcode RO_V_VMV_VX
constexpr Opcode VSLIDEDOWN_FUNCT6
constexpr Opcode RO_V_VMINU_VX
constexpr Opcode RO_V_VSSSEG2
constexpr Opcode VFSGNJX_FUNCT6
constexpr Opcode RO_V_VFMAX_VF
constexpr Opcode VMINU_FUNCT6
constexpr Opcode RO_V_VFUNARY0
constexpr Opcode RO_V_VLXSEG3
constexpr Opcode RO_V_VSSEG8
constexpr Opcode RO_V_VFNMSUB_VF
constexpr Opcode RO_V_VFMSAC_VF
constexpr Opcode RO_V_VFWNMACC_VV
constexpr Opcode VRXUNARY0_FUNCT6
constexpr Opcode RO_V_VMAXU_VX
constexpr Opcode RO_V_VFMSUB_VV
constexpr Opcode VFCVT_F_X_V
constexpr Opcode RO_V_VOR_VV
constexpr Opcode RO_V_VSRA_VI
constexpr Opcode VFMAX_FUNCT6
constexpr Opcode RO_V_VFSLIDE1UP_VF
constexpr Opcode RO_V_VREDMAXU
constexpr Opcode RO_V_VSUB_VV
constexpr Opcode RO_V_VWADD_VV
constexpr Opcode RO_V_VADC_VV
constexpr Opcode RO_V_VCOMPRESS_VV
constexpr Opcode RO_V_VFSGNJX_VV
constexpr Opcode RO_V_VMSNE_VX
constexpr Opcode RO_V_VSMUL_VV
constexpr Opcode VSRL_FUNCT6
constexpr Opcode RO_V_VMAXU_VV
constexpr Opcode VWXUNARY0_FUNCT6
constexpr Opcode RO_V_VMADC_VI
constexpr Opcode RO_V_VRGATHER_VX
constexpr Opcode VWFUNARY0_FUNCT6
constexpr Opcode RO_V_VLXSEG6
constexpr Opcode RO_V_VMUNARY0
constexpr Opcode RO_V_VMSNE_VI
constexpr Opcode VMFLT_FUNCT6
constexpr Opcode RO_V_VAND_VV
constexpr Opcode RO_V_VMSLE_VI
constexpr Opcode VFWREDOSUM_FUNCT6
constexpr Opcode RO_V_VMULH_VX
constexpr Opcode VFWCVT_X_F_V
constexpr Opcode RO_V_VSXSEG2
constexpr Opcode RO_V_VFWADD_W_VV
constexpr Opcode RO_V_VXUNARY0
constexpr Opcode VFMIN_FUNCT6
constexpr Opcode VFUNARY0_FUNCT6
constexpr Opcode RO_V_VWADDUW_VX
constexpr Opcode RO_V_VSSEG7
constexpr Opcode VFNMACC_FUNCT6
constexpr Opcode RO_V_VFMADD_VF
constexpr Opcode RO_V_VWADDU_VX
constexpr Opcode RO_V_VADC_VI
constexpr Opcode RO_V_VSSSEG8
constexpr Opcode RO_V_VMSLT_VV
constexpr Opcode RO_V_VMADC_VX
constexpr Opcode VFMUL_FUNCT6
constexpr Opcode RO_V_VSETVLI
constexpr Opcode VMUNARY0_FUNCT6
constexpr Opcode VFNCVT_F_F_W
constexpr Opcode RO_V_VWADD_VX
constexpr Opcode VDIVU_FUNCT6
constexpr Opcode RO_V_VREM_VV
constexpr Opcode RO_V_VSRA_VV
constexpr Opcode RO_V_VRSUB_VI
constexpr Opcode RO_V_VFSGNJ_VF
constexpr Opcode VNCLIPU_FUNCT6
constexpr Opcode VFWCVT_F_XU_V
constexpr Opcode RO_V_VREMU_VX
constexpr Opcode RO_V_VREDMINU
constexpr Opcode VFCVT_F_XU_V
constexpr Opcode VMIN_FUNCT6
constexpr Opcode VMSLEU_FUNCT6
constexpr Opcode VSLIDEUP_FUNCT6
constexpr Opcode RO_V_VLS
constexpr Opcode RO_V_VFMUL_VV
constexpr Opcode RO_V_VMSLTU_VV
constexpr Opcode VFWSUB_FUNCT6
constexpr Opcode RO_V_VSADD_VV
constexpr Opcode RO_V_VWMULU_VX
constexpr Opcode RO_V_VDIV_VX
constexpr Opcode RO_V_VFSGNJ_VV
constexpr Opcode VMSGT_FUNCT6
constexpr Opcode RO_V_VLSSEG5
constexpr Opcode VSSUBU_FUNCT6
constexpr Opcode RO_V_VOR_VX
constexpr Opcode RO_V_VLSEG2
constexpr Opcode RO_V_VFMIN_VF
constexpr Opcode VADD_FUNCT6
constexpr Opcode RO_V_VLXSEG5
constexpr Opcode VFNMSUB_FUNCT6
constexpr Opcode RO_V_VFMACC_VV
constexpr Opcode RO_V_VREDMAX
constexpr Opcode RO_V_VWADDU_VV
constexpr Opcode RO_V_VRGATHER_VV
constexpr Opcode VFSGNJN_FUNCT6
constexpr Opcode RO_V_VSLL_VV
constexpr Opcode VMFLE_FUNCT6
constexpr Opcode RO_V_VMAX_VX
constexpr Opcode RO_V_VFWMSAC_VV
constexpr Opcode VFCVT_XU_F_V
constexpr Opcode RO_V_VMSGTU_VX
constexpr Opcode RO_V_VLXSEG7
constexpr Opcode VFREC7_V
constexpr Opcode RO_V_VRXUNARY0
constexpr Opcode RO_V_VSADDU_VV
constexpr Opcode RO_V_VAND_VI
constexpr Opcode VMULHSU_FUNCT6
constexpr Opcode RO_V_VSSSEG7
constexpr Opcode VSUB_FUNCT6
constexpr Opcode OP_IVV
constexpr Opcode VFNMSAC_FUNCT6
constexpr Opcode OP_FVV
constexpr Opcode RO_V_VSRA_VX
constexpr Opcode VMFNE_FUNCT6
constexpr Opcode RO_V_VADC_VX
constexpr Opcode RO_V_VMFEQ_VF
constexpr Opcode VNCLIP_FUNCT6
constexpr Opcode RO_V_VLSSEG8
constexpr Opcode VMSEQ_FUNCT6
constexpr Opcode RO_V_VLXSEG8
constexpr Opcode RO_V_VMFLE_VF
constexpr Opcode VFWADD_FUNCT6
constexpr Opcode RO_V_VSSUB_VV
constexpr Opcode VFWMUL_FUNCT6
constexpr Opcode RO_V_VFMIN_VV
constexpr Opcode RO_V_VNCLIPU_WI
constexpr Opcode VREDMIN_FUNCT6
constexpr Opcode RO_V_VSRL_VV
constexpr Opcode RO_V_VFWNMSAC_VF
constexpr Opcode RO_V_VFMV_VF
constexpr Opcode RO_V_VSU
constexpr Opcode RO_V_VFNMSAC_VF
constexpr Opcode OP_FVF
constexpr Opcode RO_V_VSXSEG3
constexpr Opcode RO_V_VLSEG8
constexpr Opcode VMFGT_FUNCT6
constexpr Opcode RO_V_VLSSEG4
constexpr Opcode RO_V_VMFGE_VF
constexpr Opcode VFWADD_W_FUNCT6
constexpr Opcode RO_V_VFADD_VV
constexpr Opcode RO_V_VOR_VI
constexpr Opcode VFWMSAC_FUNCT6
constexpr Opcode RO_V_VSADD_VI
constexpr Opcode RO_V_VFWREDUSUM_VS
constexpr Opcode VRFUNARY0_FUNCT6
constexpr Opcode RO_V_VMSNE_VV
constexpr Opcode RO_V_VFMUL_VF
constexpr Opcode RO_V_VAND_VX
constexpr Opcode RO_V_VSS
constexpr Opcode RO_V_VSSEG2
constexpr Opcode RO_V_VFDIV_VV
constexpr Opcode VFWCVT_XU_F_V
constexpr Opcode RO_V_VSSUBU_VV
constexpr Opcode RO_V_VFWADD_VF
constexpr Opcode RO_V_VMSGTU_VI
constexpr Opcode VWADDUW_FUNCT6
constexpr Opcode RO_V_VWMULU_VV
constexpr Opcode VSRA_FUNCT6
constexpr Opcode VFWREDUSUM_FUNCT6
constexpr Opcode VREMU_FUNCT6
constexpr Opcode RO_V_VREM_VX
constexpr Opcode VRGATHER_FUNCT6
constexpr Opcode VSADD_FUNCT6
constexpr Opcode RO_V_VFNMACC_VV