v8
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instruction-codes-x64.h
Go to the documentation of this file.
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// Copyright 2014 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#ifndef V8_COMPILER_BACKEND_X64_INSTRUCTION_CODES_X64_H_
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#define V8_COMPILER_BACKEND_X64_INSTRUCTION_CODES_X64_H_
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namespace
v8
{
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namespace
internal
{
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namespace
compiler {
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// X64-specific opcodes that specify which assembly sequence to emit.
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// Most opcodes specify a single instruction.
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// Opcodes that support a MemoryAccessMode.
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#define TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V) \
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V(X64F64x2PromoteLowF32x4) \
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V(X64Movb) \
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V(X64Movdqu) \
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V(X64Movl) \
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V(X64Movq) \
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V(X64Movsd) \
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V(X64Movss) \
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V(X64Movsh) \
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V(X64Movsxbl) \
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V(X64Movsxbq) \
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V(X64Movsxlq) \
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V(X64Movsxwl) \
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V(X64Movsxwq) \
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V(X64Movw) \
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V(X64Movzxbl) \
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V(X64Movzxbq) \
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V(X64Movzxwl) \
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V(X64Movzxwq) \
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V(X64Pextrb) \
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V(X64Pextrw) \
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V(X64Pinsrb) \
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V(X64Pinsrd) \
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V(X64Pinsrq) \
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V(X64Pinsrw) \
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V(X64S128Load16Splat) \
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V(X64S128Load16x4S) \
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V(X64S128Load16x4U) \
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V(X64S128Load32Splat) \
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V(X64S128Load32x2S) \
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V(X64S128Load32x2U) \
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V(X64S128Load64Splat) \
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V(X64S128Load8Splat) \
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V(X64S128Load8x8S) \
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V(X64S128Load8x8U) \
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V(X64S128Store32Lane) \
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V(X64S128Store64Lane) \
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V(X64Word64AtomicStoreWord64) \
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V(X64Word64AtomicAddUint64) \
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V(X64Word64AtomicSubUint64) \
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V(X64Word64AtomicAndUint64) \
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V(X64Word64AtomicOrUint64) \
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V(X64Word64AtomicXorUint64) \
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V(X64Word64AtomicExchangeUint64) \
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V(X64Word64AtomicCompareExchangeUint64) \
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V(X64Movdqu256) \
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V(X64MovqDecompressTaggedSigned) \
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V(X64MovqDecompressTagged) \
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V(X64MovqCompressTagged) \
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V(X64MovqDecompressProtected) \
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V(X64S256Load8Splat) \
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V(X64S256Load16Splat) \
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V(X64S256Load32Splat) \
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V(X64S256Load64Splat) \
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V(X64S256Load8x16S) \
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V(X64S256Load8x16U) \
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V(X64S256Load8x8U) \
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V(X64S256Load16x8S) \
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V(X64S256Load16x8U) \
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V(X64S256Load32x4S) \
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V(X64S256Load32x4U) \
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V(SSEFloat32Add) \
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V(SSEFloat32Sub) \
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V(SSEFloat32Mul) \
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V(SSEFloat32Div) \
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V(SSEFloat64Add) \
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V(SSEFloat64Sub) \
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V(SSEFloat64Mul) \
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V(SSEFloat64Div) \
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V(AVXFloat32Add) \
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V(AVXFloat32Sub) \
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V(AVXFloat32Mul) \
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V(AVXFloat32Div) \
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V(AVXFloat64Add) \
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V(AVXFloat64Sub) \
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V(AVXFloat64Mul) \
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V(AVXFloat64Div)
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#define TARGET_ARCH_OPCODE_LIST(V) \
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TARGET_ARCH_OPCODE_WITH_MEMORY_ACCESS_MODE_LIST(V) \
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V(X64Add) \
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V(X64Add32) \
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V(X64And) \
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V(X64And32) \
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V(X64Cmp) \
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V(X64Cmp32) \
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V(X64Cmp16) \
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V(X64Cmp8) \
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V(X64Test) \
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V(X64Test32) \
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V(X64Test16) \
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V(X64Test8) \
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V(X64Or) \
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V(X64Or32) \
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V(X64Xor) \
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V(X64Xor32) \
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V(X64Sub) \
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V(X64Sub32) \
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V(X64Imul) \
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V(X64Imul32) \
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V(X64ImulHigh32) \
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V(X64ImulHigh64) \
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V(X64UmulHigh32) \
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V(X64UmulHigh64) \
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V(X64Idiv) \
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V(X64Idiv32) \
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V(X64Udiv) \
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V(X64Udiv32) \
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V(X64Not) \
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V(X64Not32) \
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V(X64Neg) \
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V(X64Neg32) \
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V(X64Shl) \
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V(X64Shl32) \
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V(X64Shr) \
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V(X64Shr32) \
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V(X64Sar) \
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V(X64Sar32) \
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V(X64Rol) \
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V(X64Rol32) \
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V(X64Ror) \
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V(X64Ror32) \
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V(X64Lzcnt) \
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V(X64Lzcnt32) \
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V(X64Tzcnt) \
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V(X64Tzcnt32) \
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V(X64Popcnt) \
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V(X64Popcnt32) \
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V(X64Bswap) \
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V(X64Bswap32) \
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V(X64MFence) \
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V(X64LFence) \
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V(SSEFloat32Cmp) \
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V(SSEFloat32Sqrt) \
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V(SSEFloat32ToFloat64) \
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V(SSEFloat32ToInt32) \
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V(SSEFloat32ToUint32) \
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V(SSEFloat32Round) \
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V(SSEFloat64Cmp) \
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V(SSEFloat64Mod) \
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V(SSEFloat64Sqrt) \
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V(SSEFloat64Round) \
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V(SSEFloat32Max) \
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V(SSEFloat64Max) \
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V(SSEFloat32Min) \
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V(SSEFloat64Min) \
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V(SSEFloat64ToFloat32) \
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V(SSEFloat64ToFloat16RawBits) \
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V(SSEFloat16RawBitsToFloat64) \
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V(SSEFloat64ToInt32) \
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V(SSEFloat64ToUint32) \
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V(SSEFloat32ToInt64) \
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V(SSEFloat64ToInt64) \
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V(SSEFloat32ToUint64) \
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V(SSEFloat64ToUint64) \
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V(SSEInt32ToFloat64) \
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V(SSEInt32ToFloat32) \
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V(SSEInt64ToFloat32) \
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V(SSEInt64ToFloat64) \
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V(SSEUint64ToFloat32) \
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V(SSEUint64ToFloat64) \
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V(SSEUint32ToFloat64) \
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V(SSEUint32ToFloat32) \
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V(SSEFloat64ExtractLowWord32) \
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V(SSEFloat64ExtractHighWord32) \
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V(SSEFloat64InsertLowWord32) \
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V(SSEFloat64InsertHighWord32) \
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V(SSEFloat64LoadLowWord32) \
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V(SSEFloat64SilenceNaN) \
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V(AVXFloat32Cmp) \
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V(AVXFloat64Cmp) \
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V(X64Float64Abs) \
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V(X64Float64Neg) \
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V(X64Float32Abs) \
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V(X64Float32Neg) \
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V(X64MovqStoreIndirectPointer) \
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V(X64MovqEncodeSandboxedPointer) \
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V(X64MovqDecodeSandboxedPointer) \
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V(X64BitcastFI) \
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V(X64BitcastDL) \
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V(X64BitcastIF) \
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V(X64BitcastLD) \
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V(X64Lea32) \
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V(X64Lea) \
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V(X64Dec32) \
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V(X64Inc32) \
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V(X64Push) \
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V(X64Poke) \
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V(X64Peek) \
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V(X64Cvttps2dq) \
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V(X64Cvttpd2dq) \
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V(X64I32x4TruncF64x2UZero) \
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V(X64I32x4TruncF32x4U) \
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V(X64I32x8TruncF32x8U) \
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V(X64FSplat) \
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V(X64FExtractLane) \
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V(X64FReplaceLane) \
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V(X64FAbs) \
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V(X64FNeg) \
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V(X64FSqrt) \
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V(X64FAdd) \
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V(X64FSub) \
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V(X64FMul) \
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V(X64FDiv) \
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V(X64FMin) \
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V(X64FMax) \
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V(X64FEq) \
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V(X64FNe) \
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V(X64FLt) \
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V(X64FLe) \
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V(X64F64x2Qfma) \
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V(X64F64x2Qfms) \
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V(X64Minpd) \
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V(X64Maxpd) \
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V(X64F64x2Round) \
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V(X64F64x2ConvertLowI32x4S) \
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V(X64F64x4ConvertI32x4S) \
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V(X64F64x2ConvertLowI32x4U) \
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V(X64F32x4SConvertI32x4) \
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V(X64F32x8SConvertI32x8) \
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V(X64F32x4UConvertI32x4) \
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V(X64F32x8UConvertI32x8) \
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V(X64F32x4Qfma) \
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V(X64F32x4Qfms) \
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V(X64Minps) \
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V(X64Maxps) \
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V(X64F32x4Round) \
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V(X64F32x4DemoteF64x2Zero) \
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V(X64F32x4DemoteF64x4) \
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V(X64F16x8Round) \
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V(X64I16x8SConvertF16x8) \
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V(X64I16x8UConvertF16x8) \
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V(X64F16x8SConvertI16x8) \
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V(X64F16x8UConvertI16x8) \
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V(X64F16x8DemoteF32x4Zero) \
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V(X64F16x8DemoteF64x2Zero) \
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V(X64F32x4PromoteLowF16x8) \
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V(X64F16x8Qfma) \
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V(X64F16x8Qfms) \
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V(X64Minph) \
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V(X64Maxph) \
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V(X64ISplat) \
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V(X64IExtractLane) \
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V(X64IAbs) \
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V(X64INeg) \
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V(X64IBitMask) \
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V(X64IShl) \
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V(X64IShrS) \
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V(X64IAdd) \
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V(X64ISub) \
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V(X64IMul) \
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V(X64IEq) \
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V(X64IGtS) \
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V(X64IGeS) \
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V(X64INe) \
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V(X64IShrU) \
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V(X64I64x2ExtMulLowI32x4S) \
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V(X64I64x2ExtMulHighI32x4S) \
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V(X64I64x2ExtMulLowI32x4U) \
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V(X64I64x2ExtMulHighI32x4U) \
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V(X64I64x2SConvertI32x4Low) \
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V(X64I64x2SConvertI32x4High) \
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V(X64I64x4SConvertI32x4) \
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V(X64I64x2UConvertI32x4Low) \
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V(X64I64x2UConvertI32x4High) \
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V(X64I64x4UConvertI32x4) \
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V(X64I32x4SConvertF32x4) \
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V(X64I32x8SConvertF32x8) \
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V(X64I32x4SConvertI16x8Low) \
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V(X64I32x4SConvertI16x8High) \
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V(X64I32x8SConvertI16x8) \
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V(X64IMinS) \
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V(X64IMaxS) \
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V(X64I32x4UConvertF32x4) \
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V(X64I32x8UConvertF32x8) \
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V(X64I32x4UConvertI16x8Low) \
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V(X64I32x4UConvertI16x8High) \
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V(X64I32x8UConvertI16x8) \
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V(X64IMinU) \
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V(X64IMaxU) \
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V(X64IGtU) \
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V(X64IGeU) \
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V(X64I32x4DotI16x8S) \
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V(X64I32x8DotI16x16S) \
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V(X64I32x4DotI8x16I7x16AddS) \
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V(X64I32x4ExtMulLowI16x8S) \
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V(X64I32x4ExtMulHighI16x8S) \
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V(X64I32x4ExtMulLowI16x8U) \
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V(X64I32x4ExtMulHighI16x8U) \
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V(X64I32x4ExtAddPairwiseI16x8S) \
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V(X64I32x8ExtAddPairwiseI16x16S) \
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V(X64I32x4ExtAddPairwiseI16x8U) \
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V(X64I32x8ExtAddPairwiseI16x16U) \
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V(X64I32x4TruncSatF64x2SZero) \
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V(X64I32x4TruncSatF64x2UZero) \
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V(X64I32X4ShiftZeroExtendI8x16) \
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V(X64IExtractLaneS) \
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V(X64I16x8SConvertI8x16Low) \
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V(X64I16x8SConvertI8x16High) \
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V(X64I16x16SConvertI8x16) \
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V(X64I16x8SConvertI32x4) \
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V(X64I16x16SConvertI32x8) \
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V(X64IAddSatS) \
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V(X64ISubSatS) \
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V(X64I16x8UConvertI8x16Low) \
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V(X64I16x8UConvertI8x16High) \
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V(X64I16x16UConvertI8x16) \
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V(X64I16x8UConvertI32x4) \
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V(X64I16x16UConvertI32x8) \
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V(X64IAddSatU) \
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V(X64ISubSatU) \
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V(X64IRoundingAverageU) \
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V(X64I16x8ExtMulLowI8x16S) \
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V(X64I16x8ExtMulHighI8x16S) \
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V(X64I16x8ExtMulLowI8x16U) \
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V(X64I16x8ExtMulHighI8x16U) \
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V(X64I16x8ExtAddPairwiseI8x16S) \
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V(X64I16x16ExtAddPairwiseI8x32S) \
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V(X64I16x8ExtAddPairwiseI8x16U) \
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V(X64I16x16ExtAddPairwiseI8x32U) \
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V(X64I16x8Q15MulRSatS) \
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V(X64I16x8RelaxedQ15MulRS) \
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V(X64I16x8DotI8x16I7x16S) \
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V(X64I8x16SConvertI16x8) \
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V(X64I8x32SConvertI16x16) \
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V(X64I8x16UConvertI16x8) \
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V(X64I8x32UConvertI16x16) \
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V(X64S128Const) \
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V(X64S256Const) \
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V(X64SZero) \
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V(X64SAllOnes) \
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V(X64SNot) \
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V(X64SAnd) \
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V(X64SOr) \
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V(X64SXor) \
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V(X64SSelect) \
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V(X64SAndNot) \
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V(X64I8x16Swizzle) \
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V(X64I8x16Shuffle) \
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V(X64Vpshufd) \
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V(X64I8x16Popcnt) \
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V(X64Shufps) \
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V(X64S32x4Rotate) \
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V(X64S32x4Swizzle) \
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V(X64S32x4Shuffle) \
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V(X64S16x8Blend) \
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V(X64S16x8HalfShuffle1) \
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V(X64S16x8HalfShuffle2) \
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V(X64S8x16Alignr) \
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V(X64S16x8Dup) \
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V(X64S8x16Dup) \
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V(X64S16x8UnzipHigh) \
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V(X64S16x8UnzipLow) \
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V(X64S8x16UnzipHigh) \
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V(X64S8x16UnzipLow) \
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V(X64S64x2UnpackHigh) \
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V(X64S32x4UnpackHigh) \
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V(X64S16x8UnpackHigh) \
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V(X64S8x16UnpackHigh) \
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V(X64S32x8UnpackHigh) \
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V(X64S64x2UnpackLow) \
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V(X64S32x4UnpackLow) \
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V(X64S16x8UnpackLow) \
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V(X64S8x16UnpackLow) \
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V(X64S32x8UnpackLow) \
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V(X64S8x16TransposeLow) \
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V(X64S8x16TransposeHigh) \
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V(X64S8x8Reverse) \
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V(X64S8x4Reverse) \
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V(X64S8x2Reverse) \
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V(X64V128AnyTrue) \
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V(X64IAllTrue) \
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V(X64Blendvpd) \
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V(X64Blendvps) \
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V(X64Pblendvb) \
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V(X64I64x4ExtMulI32x4S) \
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V(X64I64x4ExtMulI32x4U) \
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V(X64I32x8ExtMulI16x8S) \
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V(X64I32x8ExtMulI16x8U) \
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V(X64I16x16ExtMulI8x16S) \
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V(X64I16x16ExtMulI8x16U) \
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V(X64TraceInstruction) \
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V(X64F32x8Pmin) \
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V(X64F32x8Pmax) \
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V(X64F64x4Pmin) \
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V(X64F64x4Pmax) \
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V(X64ExtractF128) \
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V(X64F32x8Qfma) \
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V(X64F32x8Qfms) \
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V(X64F64x4Qfma) \
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V(X64F64x4Qfms) \
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V(X64InsertI128) \
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V(X64I32x8DotI8x32I7x32AddS) \
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V(X64I16x16DotI8x32I7x32S)
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// Addressing modes represent the "shape" of inputs to an instruction.
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// Many instructions support multiple addressing modes. Addressing modes
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// are encoded into the InstructionCode of the instruction and tell the
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// code generator after register allocation which assembler method to call.
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//
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// We use the following local notation for addressing modes:
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//
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// M = memory operand
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// R = base register
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// N = index register * N for N in {1, 2, 4, 8}
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// I = immediate displacement (32-bit signed integer)
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#define TARGET_ADDRESSING_MODE_LIST(V) \
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V(MR)
/* [%r1 ] */
\
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V(MRI)
/* [%r1 + K] */
\
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V(MR1)
/* [%r1 + %r2*1 ] */
\
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V(MR2)
/* [%r1 + %r2*2 ] */
\
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V(MR4)
/* [%r1 + %r2*4 ] */
\
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V(MR8)
/* [%r1 + %r2*8 ] */
\
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V(MR1I)
/* [%r1 + %r2*1 + K] */
\
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V(MR2I)
/* [%r1 + %r2*2 + K] */
\
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V(MR4I)
/* [%r1 + %r2*4 + K] */
\
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V(MR8I)
/* [%r1 + %r2*8 + K] */
\
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V(M1)
/* [ %r2*1 ] */
\
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V(M2)
/* [ %r2*2 ] */
\
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V(M4)
/* [ %r2*4 ] */
\
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V(M8)
/* [ %r2*8 ] */
\
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V(M1I)
/* [ %r2*1 + K] */
\
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V(M2I)
/* [ %r2*2 + K] */
\
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V(M4I)
/* [ %r2*4 + K] */
\
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V(M8I)
/* [ %r2*8 + K] */
\
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V(Root)
/* [%root + K] */
\
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V(MCR)
/* [%compressed_base + %r1] */
\
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V(MCRI)
/* [%compressed_base + %r1 + K] */
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}
// namespace compiler
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}
// namespace internal
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}
// namespace v8
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#endif
// V8_COMPILER_BACKEND_X64_INSTRUCTION_CODES_X64_H_
v8::internal::internal
internal
Definition
wasm-objects-inl.h:458
v8
Definition
api-arguments-inl.h:19
src
compiler
backend
x64
instruction-codes-x64.h
Generated on Sun Apr 6 2025 21:08:51 for v8 by
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