v8
V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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push_registers_asm.cc
Go to the documentation of this file.
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// Copyright 2020 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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// Push all callee-saved registers to get them on the stack for conservative
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// stack scanning.
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//
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// See asm/x64/push_registers_asm.cc for why the function is not generated
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// using clang.
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//
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// Calling convention source:
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// https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf Table 18.2
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#ifdef V8_TARGET_ARCH_RISCV64
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asm
(
".global PushAllRegistersAndIterateStack \n"
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".type PushAllRegistersAndIterateStack, %function \n"
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".hidden PushAllRegistersAndIterateStack \n"
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"PushAllRegistersAndIterateStack: \n"
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// Push all callee-saved registers and save return address.
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" addi sp, sp, -112 \n"
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// Save return address.
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" sd ra, 104(sp) \n"
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// sp is callee-saved.
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" sd sp, 96(sp) \n"
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// s0-s11 are callee-saved.
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" sd s11, 88(sp) \n"
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" sd s10, 80(sp) \n"
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" sd s9, 72(sp) \n"
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" sd s8, 64(sp) \n"
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" sd s7, 56(sp) \n"
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" sd s6, 48(sp) \n"
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" sd s5, 40(sp) \n"
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" sd s4, 32(sp) \n"
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" sd s3, 24(sp) \n"
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" sd s2, 16(sp) \n"
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" sd s1, 8(sp) \n"
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" sd s0, 0(sp) \n"
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// Maintain frame pointer(fp is s0).
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" mv s0, sp \n"
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// Pass 1st parameter (a0) unchanged (Stack*).
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// Pass 2nd parameter (a1) unchanged (StackVisitor*).
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// Save 3rd parameter (a2; IterateStackCallback) to a3.
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" mv a3, a2 \n"
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// Pass 3rd parameter as sp (stack pointer).
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" mv a2, sp \n"
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// Call the callback.
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" jalr a3 \n"
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// Load return address.
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" ld ra, 104(sp) \n"
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// Restore frame pointer.
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" ld s0, 0(sp) \n"
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" addi sp, sp, 112 \n"
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" jr ra \n"
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".Lfunc_end0: \n"
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".size PushAllRegistersAndIterateStack, "
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".Lfunc_end0-PushAllRegistersAndIterateStack \n"
);
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#elif V8_TARGET_ARCH_RISCV32
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asm
(
".global PushAllRegistersAndIterateStack \n"
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".type PushAllRegistersAndIterateStack, %function \n"
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".hidden PushAllRegistersAndIterateStack \n"
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"PushAllRegistersAndIterateStack: \n"
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// Push all callee-saved registers and save return address.
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" addi sp, sp, -56 \n"
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// Save return address.
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" sw ra, 52(sp) \n"
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// sp is callee-saved.
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" sw sp, 48(sp) \n"
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// s0-s11 are callee-saved.
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" sw s11, 44(sp) \n"
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" sw s10, 40(sp) \n"
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" sw s9, 36(sp) \n"
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" sw s8, 32(sp) \n"
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" sw s7, 28(sp) \n"
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" sw s6, 24(sp) \n"
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" sw s5, 20(sp) \n"
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" sw s4, 16(sp) \n"
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" sw s3, 12(sp) \n"
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" sw s2, 8(sp) \n"
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" sw s1, 4(sp) \n"
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" sw s0, 0(sp) \n"
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// Maintain frame pointer(fp is s0).
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" mv s0, sp \n"
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// Pass 1st parameter (a0) unchanged (Stack*).
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// Pass 2nd parameter (a1) unchanged (StackVisitor*).
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// Save 3rd parameter (a2; IterateStackCallback) to a3.
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" mv a3, a2 \n"
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// Pass 3rd parameter as sp (stack pointer).
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" mv a2, sp \n"
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// Call the callback.
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" jalr a3 \n"
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// Load return address.
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" lw ra, 52(sp) \n"
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// Restore frame pointer.
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" lw s0, 0(sp) \n"
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" addi sp, sp, 56 \n"
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" jr ra \n"
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".Lfunc_end0: \n"
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".size PushAllRegistersAndIterateStack, "
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".Lfunc_end0-PushAllRegistersAndIterateStack \n"
);
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#endif
src
heap
base
asm
riscv
push_registers_asm.cc
Generated on Sun Apr 6 2025 21:08:54 for v8 by
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