assembler-x64.h File Reference

#include <deque>
#include <map>
#include <memory>
#include <vector>
#include "src/base/export-template.h"
#include "src/codegen/assembler.h"
#include "src/codegen/cpu-features.h"
#include "src/codegen/label.h"
#include "src/codegen/x64/builtin-jump-table-info-x64.h"
#include "src/codegen/x64/constants-x64.h"
#include "src/codegen/x64/fma-instr.h"
#include "src/codegen/x64/register-x64.h"
#include "src/codegen/x64/sse-instr.h"
#include "src/objects/smi.h"

Include dependency graph for assembler-x64.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes
class	v8::internal::Immediate
class	v8::internal::Immediate64
class	v8::internal::Operand
struct	v8::internal::Operand::LabelOperand
struct	v8::internal::Operand::MemoryOperand
class	v8::internal::Operand256
class	v8::internal::ConstPool
class	v8::internal::Assembler
class	v8::internal::EnsureSpace

Namespaces
namespace	v8
namespace	v8::internal

Macros
#define	ASSEMBLER_INSTRUCTION_LIST(V)
#define	SHIFT_INSTRUCTION_LIST(V)
#define	DECLARE_INSTRUCTION(instruction)
#define	DECLARE_SHIFT_INSTRUCTION(instruction, subcode)
#define	DECLARE_SSE_INSTRUCTION(instruction, escape, opcode)
#define	DECLARE_SSE2_INSTRUCTION(instruction, prefix, escape, opcode)
#define	DECLARE_SSE2_SHIFT_IMM(instruction, prefix, escape, opcode, extension)
#define	DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode)
#define	DECLARE_SSE2_PD_AVX_INSTRUCTION(instruction, prefix, escape, opcode)
#define	DECLARE_SSE2_PI_AVX_INSTRUCTION(instruction, prefix, escape, opcode)
#define	DECLARE_SSE2_SHIFT_AVX_INSTRUCTION(instruction, prefix, escape, opcode)
#define	DECLARE_SSE2_UNOP_AVX_INSTRUCTION(instruction, prefix, escape, opcode)
#define	DECLARE_SSE2_UNOP_AVX_YMM_INSTRUCTION( instruction, opcode, DSTRegister, SRCRegister, MemOperand)
#define	DECLARE_SSSE3_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_SSE4_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_SSE4_EXTRACT_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_SSE4_2_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_SSE34_AVX_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_SSSE3_UNOP_AVX_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_SSE4_PMOV_AVX_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_SSE4_PMOV_AVX2_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	DECLARE_AVX_INSTRUCTION(instruction, prefix, escape1, escape2, opcode)
#define	SSE_CMP_P(instr, imm8)
#define	FMA(instr, prefix, escape1, escape2, extension, opcode)
#define	DECLARE_FMA_YMM_INSTRUCTION(instr, prefix, escape1, escape2, extension, opcode)
#define	AVX_SSE_UNOP(instr, escape, opcode)
#define	AVX_SSE_BINOP(instr, escape, opcode)
#define	AVX_3(instr, opcode, impl, SIMDRegister)
#define	AVX_SCALAR(instr, prefix, escape, opcode)
#define	AVX_SSE2_SHIFT_IMM(instr, prefix, escape, opcode, extension)
#define	AVX_CMP_P(instr, imm8, SIMDRegister)
#define	AVX2_INSTRUCTION(instr, prefix, escape1, escape2, opcode)

Enumerations
enum	v8::internal::Condition : int {   v8::internal::kNoCondition = -1 , v8::internal::eq = 0 << 28 , v8::internal::ne = 1 << 28 , v8::internal::cs = 2 << 28 ,   v8::internal::cc = 3 << 28 , v8::internal::mi = 4 << 28 , v8::internal::pl = 5 << 28 , v8::internal::vs = 6 << 28 ,   v8::internal::vc = 7 << 28 , v8::internal::hi = 8 << 28 , v8::internal::ls = 9 << 28 , v8::internal::ge = 10 << 28 ,   v8::internal::lt = 11 << 28 , v8::internal::gt = 12 << 28 , v8::internal::le = 13 << 28 , v8::internal::al = 14 << 28 ,   v8::internal::kSpecialCondition = 15 << 28 , v8::internal::kNumberOfConditions = 16 , v8::internal::hs = cs , v8::internal::lo = cc ,   v8::internal::kEqual = eq , v8::internal::kNotEqual = ne , v8::internal::kLessThan = lt , v8::internal::kGreaterThan = gt ,   v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge , v8::internal::kUnsignedLessThan = lo , v8::internal::kUnsignedGreaterThan = hi ,   v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs , v8::internal::kOverflow = vs , v8::internal::kNoOverflow = vc ,   v8::internal::kZero = eq , v8::internal::kNotZero = ne , v8::internal::eq = 0 << 28 , v8::internal::ne = 1 << 28 ,   v8::internal::hs = cs , v8::internal::cs = 2 << 28 , v8::internal::lo = cc , v8::internal::cc = 3 << 28 ,   v8::internal::mi = 4 << 28 , v8::internal::pl = 5 << 28 , v8::internal::vs = 6 << 28 , v8::internal::vc = 7 << 28 ,   v8::internal::hi = 8 << 28 , v8::internal::ls = 9 << 28 , v8::internal::ge = 10 << 28 , v8::internal::lt = 11 << 28 ,   v8::internal::gt = 12 << 28 , v8::internal::le = 13 << 28 , v8::internal::al = 14 << 28 , v8::internal::nv = 15 ,   v8::internal::kEqual = eq , v8::internal::kNotEqual = ne , v8::internal::kLessThan = lt , v8::internal::kGreaterThan = gt ,   v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge , v8::internal::kUnsignedLessThan = lo , v8::internal::kUnsignedGreaterThan = hi ,   v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs , v8::internal::kOverflow = vs , v8::internal::kNoOverflow = vc ,   v8::internal::kZero = eq , v8::internal::kNotZero = ne , v8::internal::overflow = 0 , v8::internal::no_overflow = 1 ,   v8::internal::below = 2 , v8::internal::above_equal = 3 , v8::internal::equal = 4 , v8::internal::not_equal = 5 ,   v8::internal::below_equal = 6 , v8::internal::above = 7 , v8::internal::negative = 8 , v8::internal::positive = 9 ,   v8::internal::parity_even = 10 , v8::internal::parity_odd = 11 , v8::internal::less = 12 , v8::internal::greater_equal = 13 ,   v8::internal::less_equal = 14 , v8::internal::greater = 15 , v8::internal::carry = below , v8::internal::not_carry = above_equal ,   v8::internal::zero = equal , v8::internal::not_zero = not_equal , v8::internal::sign = negative , v8::internal::not_sign = positive ,   v8::internal::kEqual = eq , v8::internal::kNotEqual = ne , v8::internal::kLessThan = lt , v8::internal::kGreaterThan = gt ,   v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge , v8::internal::kUnsignedLessThan = lo , v8::internal::kUnsignedGreaterThan = hi ,   v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs , v8::internal::kOverflow = vs , v8::internal::kNoOverflow = vc ,   v8::internal::kZero = eq , v8::internal::kNotZero = ne , v8::internal::overflow = 0 , v8::internal::no_overflow = 1 ,   v8::internal::Uless = 2 , v8::internal::Ugreater_equal = 3 , v8::internal::Uless_equal = 4 , v8::internal::Ugreater = 5 ,   v8::internal::equal = 4 , v8::internal::not_equal = 5 , v8::internal::negative = 8 , v8::internal::positive = 9 ,   v8::internal::parity_even = 10 , v8::internal::parity_odd = 11 , v8::internal::less = 12 , v8::internal::greater_equal = 13 ,   v8::internal::less_equal = 14 , v8::internal::greater = 15 , v8::internal::ueq = 16 , v8::internal::ogl = 17 ,   v8::internal::cc_always = 18 , v8::internal::carry = below , v8::internal::not_carry = above_equal , v8::internal::zero = equal ,   v8::internal::eq = 0 << 28 , v8::internal::not_zero = not_equal , v8::internal::ne = 1 << 28 , v8::internal::nz = not_equal ,   v8::internal::sign = negative , v8::internal::not_sign = positive , v8::internal::mi = 4 << 28 , v8::internal::pl = 5 << 28 ,   v8::internal::hi = 8 << 28 , v8::internal::ls = 9 << 28 , v8::internal::ge = 10 << 28 , v8::internal::lt = 11 << 28 ,   v8::internal::gt = 12 << 28 , v8::internal::le = 13 << 28 , v8::internal::hs = cs , v8::internal::lo = cc ,   v8::internal::al = 14 << 28 , v8::internal::ult = Uless , v8::internal::uge = Ugreater_equal , v8::internal::ule = Uless_equal ,   v8::internal::ugt = Ugreater , v8::internal::kEqual = eq , v8::internal::kNotEqual = ne , v8::internal::kLessThan = lt ,   v8::internal::kGreaterThan = gt , v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge , v8::internal::kUnsignedLessThan = lo ,   v8::internal::kUnsignedGreaterThan = hi , v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs , v8::internal::kOverflow = vs ,   v8::internal::kNoOverflow = vc , v8::internal::kZero = eq , v8::internal::kNotZero = ne , v8::internal::overflow = 0 ,   v8::internal::no_overflow = 1 , v8::internal::Uless = 2 , v8::internal::Ugreater_equal = 3 , v8::internal::Uless_equal = 4 ,   v8::internal::Ugreater = 5 , v8::internal::equal = 4 , v8::internal::not_equal = 5 , v8::internal::negative = 8 ,   v8::internal::positive = 9 , v8::internal::parity_even = 10 , v8::internal::parity_odd = 11 , v8::internal::less = 12 ,   v8::internal::greater_equal = 13 , v8::internal::less_equal = 14 , v8::internal::greater = 15 , v8::internal::ueq = 16 ,   v8::internal::ogl = 17 , v8::internal::cc_always = 18 , v8::internal::carry = below , v8::internal::not_carry = above_equal ,   v8::internal::zero = equal , v8::internal::eq = 0 << 28 , v8::internal::not_zero = not_equal , v8::internal::ne = 1 << 28 ,   v8::internal::nz = not_equal , v8::internal::sign = negative , v8::internal::not_sign = positive , v8::internal::mi = 4 << 28 ,   v8::internal::pl = 5 << 28 , v8::internal::hi = 8 << 28 , v8::internal::ls = 9 << 28 , v8::internal::ge = 10 << 28 ,   v8::internal::lt = 11 << 28 , v8::internal::gt = 12 << 28 , v8::internal::le = 13 << 28 , v8::internal::hs = cs ,   v8::internal::lo = cc , v8::internal::al = 14 << 28 , v8::internal::ult = Uless , v8::internal::uge = Ugreater_equal ,   v8::internal::ule = Uless_equal , v8::internal::ugt = Ugreater , v8::internal::kEqual = eq , v8::internal::kNotEqual = ne ,   v8::internal::kLessThan = lt , v8::internal::kGreaterThan = gt , v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge ,   v8::internal::kUnsignedLessThan = lo , v8::internal::kUnsignedGreaterThan = hi , v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs ,   v8::internal::kOverflow = vs , v8::internal::kNoOverflow = vc , v8::internal::kZero = eq , v8::internal::kNotZero = ne ,   v8::internal::kNoCondition = -1 , v8::internal::eq = 0 << 28 , v8::internal::ne = 1 << 28 , v8::internal::ge = 10 << 28 ,   v8::internal::lt = 11 << 28 , v8::internal::gt = 12 << 28 , v8::internal::le = 13 << 28 , v8::internal::unordered = 6 ,   v8::internal::ordered = 7 , v8::internal::overflow = 0 , v8::internal::nooverflow = 9 , v8::internal::al = 14 << 28 ,   v8::internal::kEqual = eq , v8::internal::kNotEqual = ne , v8::internal::kLessThan = lt , v8::internal::kGreaterThan = gt ,   v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge , v8::internal::kUnsignedLessThan = lo , v8::internal::kUnsignedGreaterThan = hi ,   v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs , v8::internal::kOverflow = vs , v8::internal::kNoOverflow = vc ,   v8::internal::kZero = eq , v8::internal::kNotZero = ne , v8::internal::overflow = 0 , v8::internal::no_overflow = 1 ,   v8::internal::Uless = 2 , v8::internal::Ugreater_equal = 3 , v8::internal::Uless_equal = 4 , v8::internal::Ugreater = 5 ,   v8::internal::equal = 4 , v8::internal::not_equal = 5 , v8::internal::less = 12 , v8::internal::greater_equal = 13 ,   v8::internal::less_equal = 14 , v8::internal::greater = 15 , v8::internal::cc_always = 18 , v8::internal::eq = 0 << 28 ,   v8::internal::ne = 1 << 28 , v8::internal::ge = 10 << 28 , v8::internal::lt = 11 << 28 , v8::internal::gt = 12 << 28 ,   v8::internal::le = 13 << 28 , v8::internal::al = 14 << 28 , v8::internal::ult = Uless , v8::internal::uge = Ugreater_equal ,   v8::internal::ule = Uless_equal , v8::internal::ugt = Ugreater , v8::internal::kEqual = eq , v8::internal::kNotEqual = ne ,   v8::internal::kLessThan = lt , v8::internal::kGreaterThan = gt , v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge ,   v8::internal::kUnsignedLessThan = lo , v8::internal::kUnsignedGreaterThan = hi , v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs ,   v8::internal::kOverflow = vs , v8::internal::kNoOverflow = vc , v8::internal::kZero = eq , v8::internal::kNotZero = ne ,   v8::internal::kNoCondition = -1 , v8::internal::eq = 0 << 28 , v8::internal::ne = 1 << 28 , v8::internal::ge = 10 << 28 ,   v8::internal::lt = 11 << 28 , v8::internal::gt = 12 << 28 , v8::internal::le = 13 << 28 , v8::internal::al = 14 << 28 ,   v8::internal::CC_NOP = 0x0 , v8::internal::CC_EQ = 0x08 , v8::internal::CC_LT = 0x04 , v8::internal::CC_LE = CC_EQ | CC_LT ,   v8::internal::CC_GT = 0x02 , v8::internal::CC_GE = CC_EQ | CC_GT , v8::internal::CC_OF = 0x01 , v8::internal::CC_NOF = 0x0E ,   v8::internal::CC_ALWAYS = 0x0F , v8::internal::unordered = 6 , v8::internal::ordered = 7 , v8::internal::overflow = 0 ,   v8::internal::nooverflow = 9 , v8::internal::mask0x0 = 0 , v8::internal::mask0x1 = 1 , v8::internal::mask0x2 = 2 ,   v8::internal::mask0x3 = 3 , v8::internal::mask0x4 = 4 , v8::internal::mask0x5 = 5 , v8::internal::mask0x6 = 6 ,   v8::internal::mask0x7 = 7 , v8::internal::mask0x8 = 8 , v8::internal::mask0x9 = 9 , v8::internal::mask0xA = 10 ,   v8::internal::mask0xB = 11 , v8::internal::mask0xC = 12 , v8::internal::mask0xD = 13 , v8::internal::mask0xE = 14 ,   v8::internal::mask0xF = 15 , v8::internal::kEqual = eq , v8::internal::kNotEqual = ne , v8::internal::kLessThan = lt ,   v8::internal::kGreaterThan = gt , v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge , v8::internal::kUnsignedLessThan = lo ,   v8::internal::kUnsignedGreaterThan = hi , v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs , v8::internal::kOverflow = vs ,   v8::internal::kNoOverflow = vc , v8::internal::kZero = eq , v8::internal::kNotZero = ne , v8::internal::overflow = 0 ,   v8::internal::no_overflow = 1 , v8::internal::below = 2 , v8::internal::above_equal = 3 , v8::internal::equal = 4 ,   v8::internal::not_equal = 5 , v8::internal::below_equal = 6 , v8::internal::above = 7 , v8::internal::negative = 8 ,   v8::internal::positive = 9 , v8::internal::parity_even = 10 , v8::internal::parity_odd = 11 , v8::internal::less = 12 ,   v8::internal::greater_equal = 13 , v8::internal::less_equal = 14 , v8::internal::greater = 15 , v8::internal::carry = below ,   v8::internal::not_carry = above_equal , v8::internal::zero = equal , v8::internal::not_zero = not_equal , v8::internal::sign = negative ,   v8::internal::not_sign = positive , v8::internal::kEqual = eq , v8::internal::kNotEqual = ne , v8::internal::kLessThan = lt ,   v8::internal::kGreaterThan = gt , v8::internal::kLessThanEqual = le , v8::internal::kGreaterThanEqual = ge , v8::internal::kUnsignedLessThan = lo ,   v8::internal::kUnsignedGreaterThan = hi , v8::internal::kUnsignedLessThanEqual = ls , v8::internal::kUnsignedGreaterThanEqual = hs , v8::internal::kOverflow = vs ,   v8::internal::kNoOverflow = vc , v8::internal::kZero = eq , v8::internal::kNotZero = ne }
enum	v8::internal::RoundingMode { v8::internal::kRoundDown = 0x1 , v8::internal::kRoundUp = 0x2 , v8::internal::kRoundDown = 0x1 , v8::internal::kRoundUp = 0x2 }
enum	v8::internal::ScaleFactor : int8_t {   v8::internal::times_1 = 0 , v8::internal::times_2 = 1 , v8::internal::times_4 = 2 , v8::internal::times_8 = 3 ,   v8::internal::times_int_size = times_4 , v8::internal::times_half_system_pointer_size = times_2 , v8::internal::times_system_pointer_size = times_4 , v8::internal::times_tagged_size = times_4 ,   v8::internal::times_1 = 0 , v8::internal::times_2 = 1 , v8::internal::times_4 = 2 , v8::internal::times_8 = 3 ,   v8::internal::times_int_size = times_4 , v8::internal::times_half_system_pointer_size = times_2 , v8::internal::times_system_pointer_size = times_4 , v8::internal::times_tagged_size = times_4 ,   v8::internal::times_external_pointer_size = V8_ENABLE_SANDBOX_BOOL ? times_4 : times_8 }

Functions
Condition	v8::internal::NegateCondition (Condition cond)
	v8::internal::ASSERT_TRIVIALLY_COPYABLE (Immediate)
	v8::internal::ASSERT_TRIVIALLY_COPYABLE (Operand)
bool	v8::internal::operator!= (Operand op, XMMRegister r)

Macro Definition Documentation

ASSEMBLER_INSTRUCTION_LIST

#define ASSEMBLER_INSTRUCTION_LIST

(

V

)

Value:

  V(add)                              \
  V(and)                              \
  V(cmp)                              \
  V(cmpxchg)                          \
  V(dec)                              \
  V(idiv)                             \
  V(div)                              \
  V(imul)                             \
  V(inc)                              \
  V(lea)                              \
  V(mov)                              \
  V(movzxb)                           \
  V(movzxw)                           \
  V(not )                             \
  V(or)                               \
  V(repmovs)                          \
  V(sbb)                              \
  V(sub)                              \
  V(test)                             \
  V(xchg)                             \
  V(xor)                              \
  V(aligned_cmp)                      \
  V(aligned_test)

Definition at line 389 of file assembler-x64.h.

AVX2_INSTRUCTION

#define AVX2_INSTRUCTION	(		instr,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  template <typename Reg, typename Op>                                      \
  void instr(Reg dst, Op src) {                                             \
    vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0, \
           AVX2);                                                           \
  }

Definition at line 2275 of file assembler-x64.h.

AVX_3

#define AVX_3	(		instr,
			opcode,
			impl,
			SIMDRegister )

Value:

  void instr(SIMDRegister dst, SIMDRegister src1, SIMDRegister src2) { \
    impl(opcode, dst, src1, src2);                                     \
  }                                                                    \
  void instr(SIMDRegister dst, SIMDRegister src1, Operand src2) {      \
    impl(opcode, dst, src1, src2);                                     \
  }

Definition at line 1831 of file assembler-x64.h.

AVX_CMP_P

#define AVX_CMP_P	(		instr,
			imm8,
			SIMDRegister )

Value:

  void instr##ps(SIMDRegister dst, SIMDRegister src1, SIMDRegister src2) { \
    vcmpps(dst, src1, src2, imm8);                                         \
  }                                                                        \
  void instr##ps(SIMDRegister dst, SIMDRegister src1, Operand src2) {      \
    vcmpps(dst, src1, src2, imm8);                                         \
  }                                                                        \
  void instr##pd(SIMDRegister dst, SIMDRegister src1, SIMDRegister src2) { \
    vcmppd(dst, src1, src2, imm8);                                         \
  }                                                                        \
  void instr##pd(SIMDRegister dst, SIMDRegister src1, Operand src2) {      \
    vcmppd(dst, src1, src2, imm8);                                         \
  }

Definition at line 2084 of file assembler-x64.h.

AVX_SCALAR

#define AVX_SCALAR	(		instr,
			prefix,
			escape,
			opcode )

Value:

  void v##instr(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kWIG);   \
  }                                                                    \
  void v##instr(XMMRegister dst, XMMRegister src1, Operand src2) {     \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kWIG);   \
  }

Definition at line 1842 of file assembler-x64.h.

AVX_SSE2_SHIFT_IMM

#define AVX_SSE2_SHIFT_IMM	(		instr,
			prefix,
			escape,
			opcode,
			extension )

Value:

  void v##instr(XMMRegister dst, XMMRegister src, uint8_t imm8) {      \
    XMMRegister ext_reg = XMMRegister::from_code(extension);           \
    vinstr(0x##opcode, ext_reg, dst, src, k##prefix, k##escape, kWIG); \
    emit(imm8);                                                        \
  }                                                                    \
                                                                       \
  void v##instr(YMMRegister dst, YMMRegister src, uint8_t imm8) {      \
    YMMRegister ext_reg = YMMRegister::from_code(extension);           \
    vinstr(0x##opcode, ext_reg, dst, src, k##prefix, k##escape, kWIG); \
    emit(imm8);                                                        \
  }

Definition at line 1855 of file assembler-x64.h.

AVX_SSE_BINOP

#define AVX_SSE_BINOP	(		instr,
			escape,
			opcode )

Value:

  void v##instr(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
    vps(0x##opcode, dst, src1, src2);                                  \
  }                                                                    \
  void v##instr(XMMRegister dst, XMMRegister src1, Operand src2) {     \
    vps(0x##opcode, dst, src1, src2);                                  \
  }                                                                    \
  void v##instr(YMMRegister dst, YMMRegister src1, YMMRegister src2) { \
    vps(0x##opcode, dst, src1, src2);                                  \
  }                                                                    \
  void v##instr(YMMRegister dst, YMMRegister src1, Operand src2) {     \
    vps(0x##opcode, dst, src1, src2);                                  \
  }

Definition at line 1815 of file assembler-x64.h.

AVX_SSE_UNOP

#define AVX_SSE_UNOP	(		instr,
			escape,
			opcode )

Value:

  void v##instr(XMMRegister dst, XMMRegister src2) { \
    vps(0x##opcode, dst, xmm0, src2);                \
  }                                                  \
  void v##instr(XMMRegister dst, Operand src2) {     \
    vps(0x##opcode, dst, xmm0, src2);                \
  }                                                  \
  void v##instr(YMMRegister dst, YMMRegister src2) { \
    vps(0x##opcode, dst, ymm0, src2);                \
  }                                                  \
  void v##instr(YMMRegister dst, Operand src2) {     \
    vps(0x##opcode, dst, ymm0, src2);                \
  }

Definition at line 1799 of file assembler-x64.h.

DECLARE_AVX_INSTRUCTION

#define DECLARE_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void v##instruction(Register dst, XMMRegister src, uint8_t imm8) {           \
    XMMRegister idst = XMMRegister::from_code(dst.code());                     \
    vinstr(0x##opcode, src, xmm0, idst, k##prefix, k##escape1##escape2, kW0);  \
    emit(imm8);                                                                \
  }                                                                            \
  void v##instruction(Operand dst, XMMRegister src, uint8_t imm8) {            \
    vinstr(0x##opcode, src, xmm0, dst, k##prefix, k##escape1##escape2, kW0);   \
    emit(imm8);                                                                \
  }

Definition at line 1583 of file assembler-x64.h.

DECLARE_FMA_YMM_INSTRUCTION

#define DECLARE_FMA_YMM_INSTRUCTION	(		instr,
			prefix,
			escape1,
			escape2,
			extension,
			opcode )

Value:

  void instr(YMMRegister dst, YMMRegister src1, YMMRegister src2) {  \
    fma_instr(0x##opcode, dst, src1, src2, kL256, k##prefix,         \
              k##escape1##escape2, k##extension);                    \
  }                                                                  \
  void instr(YMMRegister dst, YMMRegister src1, Operand src2) {      \
    fma_instr(0x##opcode, dst, src1, src2, kL256, k##prefix,         \
              k##escape1##escape2, k##extension);                    \
  }

Definition at line 1756 of file assembler-x64.h.

DECLARE_INSTRUCTION

#define DECLARE_INSTRUCTION

(

instruction

)

Value:

  template <typename... Ps>                 \
  void instruction##_tagged(Ps... ps) {     \
    emit_##instruction(ps..., kTaggedSize); \
  }                                         \
                                            \
  template <typename... Ps>                 \
  void instruction##l(Ps... ps) {           \
    emit_##instruction(ps..., kInt32Size);  \
  }                                         \
                                            \
  template <typename... Ps>                 \
  void instruction##q(Ps... ps) {           \
    emit_##instruction(ps..., kInt64Size);  \
  }

Definition at line 615 of file assembler-x64.h.

DECLARE_SHIFT_INSTRUCTION

#define DECLARE_SHIFT_INSTRUCTION	(		instruction,
			subcode )

Value:

  void instruction##l(Register dst, Immediate imm8) {                       \
    shift(dst, imm8, subcode, kInt32Size);                                  \
  }                                                                         \
                                                                            \
  void instruction##q(Register dst, Immediate imm8) {                       \
    shift(dst, imm8, subcode, kInt64Size);                                  \
  }                                                                         \
                                                                            \
  void instruction##l(Operand dst, Immediate imm8) {                        \
    shift(dst, imm8, subcode, kInt32Size);                                  \
  }                                                                         \
                                                                            \
  void instruction##q(Operand dst, Immediate imm8) {                        \
    shift(dst, imm8, subcode, kInt64Size);                                  \
  }                                                                         \
                                                                            \
  void instruction##l_cl(Register dst) { shift(dst, subcode, kInt32Size); } \
                                                                            \
  void instruction##q_cl(Register dst) { shift(dst, subcode, kInt64Size); } \
                                                                            \
  void instruction##l_cl(Operand dst) { shift(dst, subcode, kInt32Size); }  \
                                                                            \
  void instruction##q_cl(Operand dst) { shift(dst, subcode, kInt64Size); }

Definition at line 921 of file assembler-x64.h.

DECLARE_SSE2_AVX_INSTRUCTION

#define DECLARE_SSE2_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape,
			opcode )

Value:

  void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0);          \
  }                                                                          \
  void v##instruction(XMMRegister dst, XMMRegister src1, Operand src2) {     \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0);          \
  }

Definition at line 1315 of file assembler-x64.h.

DECLARE_SSE2_INSTRUCTION

#define DECLARE_SSE2_INSTRUCTION	(		instruction,
			prefix,
			escape,
			opcode )

Value:

  void instruction(XMMRegister dst, XMMRegister src) {                \
    sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode);         \
  }                                                                   \
  void instruction(XMMRegister dst, Operand src) {                    \
    sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode);         \
  }

Definition at line 1286 of file assembler-x64.h.

DECLARE_SSE2_PD_AVX_INSTRUCTION

#define DECLARE_SSE2_PD_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape,
			opcode )

Value:

  DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode)          \
  void v##instruction(YMMRegister dst, YMMRegister src1, YMMRegister src2) { \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX);     \
  }                                                                          \
  void v##instruction(YMMRegister dst, YMMRegister src1, Operand src2) {     \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX);     \
  }

Definition at line 1323 of file assembler-x64.h.

DECLARE_SSE2_PI_AVX_INSTRUCTION

#define DECLARE_SSE2_PI_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape,
			opcode )

Value:

  DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode)          \
  void v##instruction(YMMRegister dst, YMMRegister src1, YMMRegister src2) { \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2);    \
  }                                                                          \
  void v##instruction(YMMRegister dst, YMMRegister src1, Operand src2) {     \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2);    \
  }

Definition at line 1335 of file assembler-x64.h.

DECLARE_SSE2_SHIFT_AVX_INSTRUCTION

#define DECLARE_SSE2_SHIFT_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape,
			opcode )

Value:

  DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode)          \
  void v##instruction(YMMRegister dst, YMMRegister src1, XMMRegister src2) { \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2);    \
  }                                                                          \
  void v##instruction(YMMRegister dst, YMMRegister src1, Operand src2) {     \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0, AVX2);    \
  }

Definition at line 1347 of file assembler-x64.h.

DECLARE_SSE2_SHIFT_IMM

#define DECLARE_SSE2_SHIFT_IMM	(		instruction,
			prefix,
			escape,
			opcode,
			extension )

Value:

  void instruction(XMMRegister reg, uint8_t imm8) {                            \
    sse2_instr(reg, imm8, 0x##prefix, 0x##escape, 0x##opcode, 0x##extension);  \
  }

Definition at line 1308 of file assembler-x64.h.

DECLARE_SSE2_UNOP_AVX_INSTRUCTION

#define DECLARE_SSE2_UNOP_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape,
			opcode )

Value:

  void v##instruction(XMMRegister dst, XMMRegister src) {                      \
    vpd(0x##opcode, dst, xmm0, src);                                           \
  }                                                                            \
  void v##instruction(XMMRegister dst, Operand src) {                          \
    vpd(0x##opcode, dst, xmm0, src);                                           \
  }

Definition at line 1361 of file assembler-x64.h.

DECLARE_SSE2_UNOP_AVX_YMM_INSTRUCTION

#define DECLARE_SSE2_UNOP_AVX_YMM_INSTRUCTION	(		instruction,
			opcode,
			DSTRegister,
			SRCRegister,
			MemOperand )

Value:

  void v##instruction(DSTRegister dst, SRCRegister src) {      \
    vpd(0x##opcode, dst, ymm0, src);                           \
  }                                                            \
  void v##instruction(DSTRegister dst, MemOperand src) {       \
    vpd(0x##opcode, dst, ymm0, src);                           \
  }

Definition at line 1372 of file assembler-x64.h.

DECLARE_SSE34_AVX_INSTRUCTION

#define DECLARE_SSE34_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) {  \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \
  }                                                                           \
  void v##instruction(XMMRegister dst, XMMRegister src1, Operand src2) {      \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \
  }                                                                           \
  void v##instruction(YMMRegister dst, YMMRegister src1, YMMRegister src2) {  \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0,  \
           AVX2);                                                             \
  }                                                                           \
  void v##instruction(YMMRegister dst, YMMRegister src1, Operand src2) {      \
    vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0,  \
           AVX2);                                                             \
  }

Definition at line 1475 of file assembler-x64.h.

DECLARE_SSE4_2_INSTRUCTION

#define DECLARE_SSE4_2_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void instruction(XMMRegister dst, XMMRegister src) {                        \
    sse4_2_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \
  }                                                                           \
  void instruction(XMMRegister dst, Operand src) {                            \
    sse4_2_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \
  }

Definition at line 1463 of file assembler-x64.h.

DECLARE_SSE4_EXTRACT_INSTRUCTION

#define DECLARE_SSE4_EXTRACT_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void instruction(Register dst, XMMRegister src, uint8_t imm8) {          \
    sse4_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode, \
               imm8);                                                      \
  }                                                                        \
  void instruction(Operand dst, XMMRegister src, uint8_t imm8) {           \
    sse4_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode, \
               imm8);                                                      \
  }

Definition at line 1444 of file assembler-x64.h.

DECLARE_SSE4_INSTRUCTION

#define DECLARE_SSE4_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void instruction(XMMRegister dst, XMMRegister src) {                      \
    sse4_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \
  }                                                                         \
  void instruction(XMMRegister dst, Operand src) {                          \
    sse4_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \
  }

Definition at line 1428 of file assembler-x64.h.

DECLARE_SSE4_PMOV_AVX2_INSTRUCTION

#define DECLARE_SSE4_PMOV_AVX2_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void v##instruction(YMMRegister dst, XMMRegister src) {                    \
    vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
  }                                                                          \
  void v##instruction(YMMRegister dst, Operand src) {                        \
    vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
  }

Definition at line 1565 of file assembler-x64.h.

DECLARE_SSE4_PMOV_AVX_INSTRUCTION

#define DECLARE_SSE4_PMOV_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void v##instruction(XMMRegister dst, XMMRegister src) {                    \
    vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
  }                                                                          \
  void v##instruction(XMMRegister dst, Operand src) {                        \
    vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
  }

Definition at line 1554 of file assembler-x64.h.

DECLARE_SSE_INSTRUCTION

#define DECLARE_SSE_INSTRUCTION	(		instruction,
			escape,
			opcode )

Value:

  void instruction(XMMRegister dst, XMMRegister src) {       \
    sse_instr(dst, src, 0x##escape, 0x##opcode);             \
  }                                                          \
  void instruction(XMMRegister dst, Operand src) {           \
    sse_instr(dst, src, 0x##escape, 0x##opcode);             \
  }

Definition at line 1269 of file assembler-x64.h.

DECLARE_SSSE3_INSTRUCTION

#define DECLARE_SSSE3_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void instruction(XMMRegister dst, XMMRegister src) {                       \
    ssse3_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \
  }                                                                          \
  void instruction(XMMRegister dst, Operand src) {                           \
    ssse3_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \
  }

Definition at line 1402 of file assembler-x64.h.

DECLARE_SSSE3_UNOP_AVX_INSTRUCTION

#define DECLARE_SSSE3_UNOP_AVX_INSTRUCTION	(		instruction,
			prefix,
			escape1,
			escape2,
			opcode )

Value:

  void v##instruction(XMMRegister dst, XMMRegister src) {                    \
    vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
  }                                                                          \
  void v##instruction(XMMRegister dst, Operand src) {                        \
    vinstr(0x##opcode, dst, xmm0, src, k##prefix, k##escape1##escape2, kW0); \
  }                                                                          \
  void v##instruction(YMMRegister dst, YMMRegister src) {                    \
    vinstr(0x##opcode, dst, ymm0, src, k##prefix, k##escape1##escape2, kW0); \
  }                                                                          \
  void v##instruction(YMMRegister dst, Operand src) {                        \
    vinstr(0x##opcode, dst, ymm0, src, k##prefix, k##escape1##escape2, kW0); \
  }

Definition at line 1497 of file assembler-x64.h.

FMA

#define FMA	(		instr,
			prefix,
			escape1,
			escape2,
			extension,
			opcode )

Value:

  void instr(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
    fma_instr(0x##opcode, dst, src1, src2, kL128, k##prefix,        \
              k##escape1##escape2, k##extension);                   \
  }                                                                 \
  void instr(XMMRegister dst, XMMRegister src1, Operand src2) {     \
    fma_instr(0x##opcode, dst, src1, src2, kL128, k##prefix,        \
              k##escape1##escape2, k##extension);                   \
  }

Definition at line 1744 of file assembler-x64.h.

SHIFT_INSTRUCTION_LIST

#define SHIFT_INSTRUCTION_LIST

(

V

)

Value:

  V(rol, 0x0)                     \
  V(ror, 0x1)                     \
  V(rcl, 0x2)                     \
  V(rcr, 0x3)                     \
  V(shl, 0x4)                     \
  V(shr, 0x5)                     \
  V(sar, 0x7)

Definition at line 415 of file assembler-x64.h.

SSE_CMP_P

#define SSE_CMP_P	(		instr,
			imm8 )

Value:

  void instr##ps(XMMRegister dst, XMMRegister src) { cmpps(dst, src, imm8); } \
  void instr##ps(XMMRegister dst, Operand src) { cmpps(dst, src, imm8); }     \
  void instr##pd(XMMRegister dst, XMMRegister src) { cmppd(dst, src, imm8); } \
  void instr##pd(XMMRegister dst, Operand src) { cmppd(dst, src, imm8); }

Definition at line 1686 of file assembler-x64.h.