v8::internal::AssemblerRiscvBase Class Reference

#include <base-assembler-riscv.h>

Inheritance diagram for v8::internal::AssemblerRiscvBase:

Collaboration diagram for v8::internal::AssemblerRiscvBase:

Protected Types
enum	OffsetSize : int {   kOffset21 = 21 , kOffset12 = 12 , kOffset20 = 20 , kOffset13 = 13 ,   kOffset32 = 32 , kOffset11 = 11 , kOffset9 = 9 }

Protected Member Functions
virtual int32_t	branch_offset_helper (Label *L, OffsetSize bits)=0
virtual void	emit (Instr x)=0
virtual void	emit (ShortInstr x)=0
virtual void	emit (uint64_t x)=0
virtual void	ClearVectorunit ()=0
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, FPURegister rs2)
void	GenInstrR4 (uint8_t funct2, BaseOpcode opcode, Register rd, Register rs1, Register rs2, Register rs3, FPURoundingMode frm)
void	GenInstrR4 (uint8_t funct2, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2, FPURegister rs3, FPURoundingMode frm)
void	GenInstrRAtomic (uint8_t funct5, bool aq, bool rl, uint8_t funct3, Register rd, Register rs1, Register rs2)
void	GenInstrRFrm (uint8_t funct7, BaseOpcode opcode, Register rd, Register rs1, Register rs2, FPURoundingMode frm)
void	GenInstrI (uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, int16_t imm12)
void	GenInstrI (uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, int16_t imm12)
void	GenInstrIShift (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt)
void	GenInstrIShiftW (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt)
void	GenInstrS (uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12)
void	GenInstrS (uint8_t funct3, BaseOpcode opcode, Register rs1, FPURegister rs2, int16_t imm12)
void	GenInstrB (uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12)
void	GenInstrU (BaseOpcode opcode, Register rd, int32_t imm20)
void	GenInstrJ (BaseOpcode opcode, Register rd, int32_t imm20)
void	GenInstrCR (uint8_t funct4, BaseOpcode opcode, Register rd, Register rs2)
void	GenInstrCA (uint8_t funct6, BaseOpcode opcode, Register rd, uint8_t funct, Register rs2)
void	GenInstrCI (uint8_t funct3, BaseOpcode opcode, Register rd, int8_t imm6)
void	GenInstrCIU (uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm6)
void	GenInstrCIU (uint8_t funct3, BaseOpcode opcode, FPURegister rd, uint8_t uimm6)
void	GenInstrCIW (uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm8)
void	GenInstrCSS (uint8_t funct3, BaseOpcode opcode, FPURegister rs2, uint8_t uimm6)
void	GenInstrCSS (uint8_t funct3, BaseOpcode opcode, Register rs2, uint8_t uimm6)
void	GenInstrCL (uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t uimm5)
void	GenInstrCL (uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, uint8_t uimm5)
void	GenInstrCS (uint8_t funct3, BaseOpcode opcode, Register rs2, Register rs1, uint8_t uimm5)
void	GenInstrCS (uint8_t funct3, BaseOpcode opcode, FPURegister rs2, Register rs1, uint8_t uimm5)
void	GenInstrCJ (uint8_t funct3, BaseOpcode opcode, uint16_t uint11)
void	GenInstrCB (uint8_t funct3, BaseOpcode opcode, Register rs1, uint8_t uimm8)
void	GenInstrCBA (uint8_t funct3, uint8_t funct2, BaseOpcode opcode, Register rs1, int8_t imm6)
void	GenInstrBranchCC_rri (uint8_t funct3, Register rs1, Register rs2, int16_t imm12)
void	GenInstrLoad_ri (uint8_t funct3, Register rd, Register rs1, int16_t imm12)
void	GenInstrStore_rri (uint8_t funct3, Register rs1, Register rs2, int16_t imm12)
void	GenInstrALU_ri (uint8_t funct3, Register rd, Register rs1, int16_t imm12)
void	GenInstrShift_ri (bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt)
void	GenInstrALU_rr (uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)
void	GenInstrCSR_ir (uint8_t funct3, Register rd, ControlStatusReg csr, Register rs1)
void	GenInstrCSR_ii (uint8_t funct3, Register rd, ControlStatusReg csr, uint8_t rs1)
void	GenInstrShiftW_ri (bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt)
void	GenInstrALUW_rr (uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)
void	GenInstrPriv (uint8_t funct7, Register rs1, Register rs2)
void	GenInstrLoadFP_ri (uint8_t funct3, FPURegister rd, Register rs1, int16_t imm12)
void	GenInstrStoreFP_rri (uint8_t funct3, Register rs1, FPURegister rs2, int16_t imm12)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, FPURegister rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, Register rs1, Register rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, Register rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, Register rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, FPURegister rs2)
virtual void	BlockTrampolinePoolFor (int instructions)=0

Detailed Description

Definition at line 63 of file base-assembler-riscv.h.

Member Enumeration Documentation

OffsetSize

enum v8::internal::AssemblerRiscvBase::OffsetSize : int

protected

Enumerator
kOffset21
kOffset12
kOffset20
kOffset13
kOffset32
kOffset11
kOffset9

Definition at line 68 of file base-assembler-riscv.h.

Member Function Documentation

BlockTrampolinePoolFor()

virtual void v8::internal::AssemblerRiscvBase::BlockTrampolinePoolFor ( int instructions )

protectedpure virtual

Implemented in v8::internal::Assembler, v8::internal::Assembler, v8::internal::Assembler, and v8::internal::Assembler.

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branch_offset_helper()

virtual int32_t v8::internal::AssemblerRiscvBase::branch_offset_helper ( Label * L, OffsetSize bits )

protectedpure virtual

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ClearVectorunit()

virtual void v8::internal::AssemblerRiscvBase::ClearVectorunit ( )

protectedpure virtual

Implemented in v8::internal::Assembler.

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emit() [1/3]

virtual void v8::internal::AssemblerRiscvBase::emit ( Instr x )

protectedpure virtual

Implemented in v8::internal::Assembler, v8::internal::Assembler, v8::internal::Assembler, and v8::internal::Assembler.

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emit() [2/3]

virtual void v8::internal::AssemblerRiscvBase::emit ( ShortInstr x )

protectedpure virtual

Implemented in v8::internal::Assembler.

emit() [3/3]

virtual void v8::internal::AssemblerRiscvBase::emit ( uint64_t x )

protectedpure virtual

Implemented in v8::internal::Assembler, v8::internal::Assembler, and v8::internal::Assembler.

GenInstrALU_ri()

void v8::internal::AssemblerRiscvBase::GenInstrALU_ri ( uint8_t funct3, Register rd, Register rs1, int16_t imm12 )

protected

Definition at line 406 of file base-assembler-riscv.cc.

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GenInstrALU_rr()

void v8::internal::AssemblerRiscvBase::GenInstrALU_rr ( uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2 )

protected

Definition at line 419 of file base-assembler-riscv.cc.

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GenInstrALUFP_rr() [1/5]

void v8::internal::AssemblerRiscvBase::GenInstrALUFP_rr ( uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, FPURegister rs2 )

protected

Definition at line 463 of file base-assembler-riscv.cc.

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GenInstrALUFP_rr() [2/5]

void v8::internal::AssemblerRiscvBase::GenInstrALUFP_rr ( uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, Register rs2 )

protected

Definition at line 475 of file base-assembler-riscv.cc.

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GenInstrALUFP_rr() [3/5]

void v8::internal::AssemblerRiscvBase::GenInstrALUFP_rr ( uint8_t funct7, uint8_t funct3, FPURegister rd, Register rs1, Register rs2 )

protected

Definition at line 469 of file base-assembler-riscv.cc.

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GenInstrALUFP_rr() [4/5]

void v8::internal::AssemblerRiscvBase::GenInstrALUFP_rr ( uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, FPURegister rs2 )

protected

Definition at line 487 of file base-assembler-riscv.cc.

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GenInstrALUFP_rr() [5/5]

void v8::internal::AssemblerRiscvBase::GenInstrALUFP_rr ( uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, Register rs2 )

protected

Definition at line 481 of file base-assembler-riscv.cc.

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GenInstrALUW_rr()

void v8::internal::AssemblerRiscvBase::GenInstrALUW_rr ( uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2 )

protected

Definition at line 442 of file base-assembler-riscv.cc.

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GenInstrB()

void v8::internal::AssemblerRiscvBase::GenInstrB ( uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12 )

protected

Definition at line 218 of file base-assembler-riscv.cc.

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GenInstrBranchCC_rri()

void v8::internal::AssemblerRiscvBase::GenInstrBranchCC_rri ( uint8_t funct3, Register rs1, Register rs2, int16_t imm12 )

protected

Definition at line 391 of file base-assembler-riscv.cc.

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GenInstrCA()

void v8::internal::AssemblerRiscvBase::GenInstrCA ( uint8_t funct6, BaseOpcode opcode, Register rd, uint8_t funct, Register rs2 )

protected

Definition at line 257 of file base-assembler-riscv.cc.

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GenInstrCB()

void v8::internal::AssemblerRiscvBase::GenInstrCB ( uint8_t funct3, BaseOpcode opcode, Register rs1, uint8_t uimm8 )

protected

Definition at line 371 of file base-assembler-riscv.cc.

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GenInstrCBA()

void v8::internal::AssemblerRiscvBase::GenInstrCBA ( uint8_t funct3, uint8_t funct2, BaseOpcode opcode, Register rs1, int8_t imm6 )

protected

Definition at line 380 of file base-assembler-riscv.cc.

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GenInstrCI()

void v8::internal::AssemblerRiscvBase::GenInstrCI ( uint8_t funct3, BaseOpcode opcode, Register rd, int8_t imm6 )

protected

Definition at line 267 of file base-assembler-riscv.cc.

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GenInstrCIU() [1/2]

void v8::internal::AssemblerRiscvBase::GenInstrCIU ( uint8_t funct3, BaseOpcode opcode, FPURegister rd, uint8_t uimm6 )

protected

Definition at line 285 of file base-assembler-riscv.cc.

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GenInstrCIU() [2/2]

void v8::internal::AssemblerRiscvBase::GenInstrCIU ( uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm6 )

protected

Definition at line 276 of file base-assembler-riscv.cc.

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GenInstrCIW()

void v8::internal::AssemblerRiscvBase::GenInstrCIW ( uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm8 )

protected

Definition at line 294 of file base-assembler-riscv.cc.

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GenInstrCJ()

void v8::internal::AssemblerRiscvBase::GenInstrCJ ( uint8_t funct3, BaseOpcode opcode, uint16_t uint11 )

protected

Definition at line 341 of file base-assembler-riscv.cc.

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GenInstrCL() [1/2]

void v8::internal::AssemblerRiscvBase::GenInstrCL ( uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, uint8_t uimm5 )

protected

Definition at line 330 of file base-assembler-riscv.cc.

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GenInstrCL() [2/2]

void v8::internal::AssemblerRiscvBase::GenInstrCL ( uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t uimm5 )

protected

Definition at line 319 of file base-assembler-riscv.cc.

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GenInstrCR()

void v8::internal::AssemblerRiscvBase::GenInstrCR ( uint8_t funct4, BaseOpcode opcode, Register rd, Register rs2 )

protected

Definition at line 249 of file base-assembler-riscv.cc.

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GenInstrCS() [1/2]

void v8::internal::AssemblerRiscvBase::GenInstrCS ( uint8_t funct3, BaseOpcode opcode, FPURegister rs2, Register rs1, uint8_t uimm5 )

protected

Definition at line 359 of file base-assembler-riscv.cc.

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GenInstrCS() [2/2]

void v8::internal::AssemblerRiscvBase::GenInstrCS ( uint8_t funct3, BaseOpcode opcode, Register rs2, Register rs1, uint8_t uimm5 )

protected

Definition at line 348 of file base-assembler-riscv.cc.

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GenInstrCSR_ii()

void v8::internal::AssemblerRiscvBase::GenInstrCSR_ii ( uint8_t funct3, Register rd, ControlStatusReg csr, uint8_t rs1 )

protected

Definition at line 430 of file base-assembler-riscv.cc.

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GenInstrCSR_ir()

void v8::internal::AssemblerRiscvBase::GenInstrCSR_ir ( uint8_t funct3, Register rd, ControlStatusReg csr, Register rs1 )

protected

Definition at line 425 of file base-assembler-riscv.cc.

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GenInstrCSS() [1/2]

void v8::internal::AssemblerRiscvBase::GenInstrCSS ( uint8_t funct3, BaseOpcode opcode, FPURegister rs2, uint8_t uimm6 )

protected

Definition at line 311 of file base-assembler-riscv.cc.

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GenInstrCSS() [2/2]

void v8::internal::AssemblerRiscvBase::GenInstrCSS ( uint8_t funct3, BaseOpcode opcode, Register rs2, uint8_t uimm6 )

protected

Definition at line 303 of file base-assembler-riscv.cc.

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GenInstrI() [1/2]

void v8::internal::AssemblerRiscvBase::GenInstrI ( uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, int16_t imm12 )

protected

Definition at line 163 of file base-assembler-riscv.cc.

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GenInstrI() [2/2]

void v8::internal::AssemblerRiscvBase::GenInstrI ( uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, int16_t imm12 )

protected

Definition at line 154 of file base-assembler-riscv.cc.

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GenInstrIShift()

void v8::internal::AssemblerRiscvBase::GenInstrIShift ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt )

protected

Definition at line 173 of file base-assembler-riscv.cc.

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GenInstrIShiftW()

void v8::internal::AssemblerRiscvBase::GenInstrIShiftW ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt )

protected

Definition at line 184 of file base-assembler-riscv.cc.

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GenInstrJ()

void v8::internal::AssemblerRiscvBase::GenInstrJ ( BaseOpcode opcode, Register rd, int32_t imm20 )

protected

Definition at line 238 of file base-assembler-riscv.cc.

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GenInstrLoad_ri()

void v8::internal::AssemblerRiscvBase::GenInstrLoad_ri ( uint8_t funct3, Register rd, Register rs1, int16_t imm12 )

protected

Definition at line 396 of file base-assembler-riscv.cc.

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GenInstrLoadFP_ri()

void v8::internal::AssemblerRiscvBase::GenInstrLoadFP_ri ( uint8_t funct3, FPURegister rd, Register rs1, int16_t imm12 )

protected

Definition at line 453 of file base-assembler-riscv.cc.

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GenInstrPriv()

void v8::internal::AssemblerRiscvBase::GenInstrPriv ( uint8_t funct7, Register rs1, Register rs2 )

protected

Definition at line 448 of file base-assembler-riscv.cc.

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GenInstrR() [1/6]

void v8::internal::AssemblerRiscvBase::GenInstrR ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2 )

protected

Definition at line 55 of file base-assembler-riscv.cc.

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GenInstrR() [2/6]

void v8::internal::AssemblerRiscvBase::GenInstrR ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, Register rs2 )

protected

Definition at line 88 of file base-assembler-riscv.cc.

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GenInstrR() [3/6]

void v8::internal::AssemblerRiscvBase::GenInstrR ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, Register rs2 )

protected

Definition at line 77 of file base-assembler-riscv.cc.

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GenInstrR() [4/6]

void v8::internal::AssemblerRiscvBase::GenInstrR ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, FPURegister rs2 )

protected

Definition at line 99 of file base-assembler-riscv.cc.

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GenInstrR() [5/6]

void v8::internal::AssemblerRiscvBase::GenInstrR ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, Register rs2 )

protected

Definition at line 66 of file base-assembler-riscv.cc.

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GenInstrR() [6/6]

void v8::internal::AssemblerRiscvBase::GenInstrR ( uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, Register rs2 )

protected

Definition at line 44 of file base-assembler-riscv.cc.

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GenInstrR4() [1/2]

void v8::internal::AssemblerRiscvBase::GenInstrR4 ( uint8_t funct2, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2, FPURegister rs3, FPURoundingMode frm )

protected

Definition at line 121 of file base-assembler-riscv.cc.

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GenInstrR4() [2/2]

void v8::internal::AssemblerRiscvBase::GenInstrR4 ( uint8_t funct2, BaseOpcode opcode, Register rd, Register rs1, Register rs2, Register rs3, FPURoundingMode frm )

protected

Definition at line 110 of file base-assembler-riscv.cc.

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GenInstrRAtomic()

void v8::internal::AssemblerRiscvBase::GenInstrRAtomic ( uint8_t funct5, bool aq, bool rl, uint8_t funct3, Register rd, Register rs1, Register rs2 )

protected

Definition at line 133 of file base-assembler-riscv.cc.

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GenInstrRFrm()

void v8::internal::AssemblerRiscvBase::GenInstrRFrm ( uint8_t funct7, BaseOpcode opcode, Register rd, Register rs1, Register rs2, FPURoundingMode frm )

protected

Definition at line 144 of file base-assembler-riscv.cc.

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GenInstrS() [1/2]

void v8::internal::AssemblerRiscvBase::GenInstrS ( uint8_t funct3, BaseOpcode opcode, Register rs1, FPURegister rs2, int16_t imm12 )

protected

Definition at line 206 of file base-assembler-riscv.cc.

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GenInstrS() [2/2]

void v8::internal::AssemblerRiscvBase::GenInstrS ( uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12 )

protected

Definition at line 195 of file base-assembler-riscv.cc.

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GenInstrShift_ri()

void v8::internal::AssemblerRiscvBase::GenInstrShift_ri ( bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt )

protected

Definition at line 411 of file base-assembler-riscv.cc.

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GenInstrShiftW_ri()

void v8::internal::AssemblerRiscvBase::GenInstrShiftW_ri ( bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt )

protected

Definition at line 435 of file base-assembler-riscv.cc.

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GenInstrStore_rri()

void v8::internal::AssemblerRiscvBase::GenInstrStore_rri ( uint8_t funct3, Register rs1, Register rs2, int16_t imm12 )

protected

Definition at line 401 of file base-assembler-riscv.cc.

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GenInstrStoreFP_rri()

void v8::internal::AssemblerRiscvBase::GenInstrStoreFP_rri ( uint8_t funct3, Register rs1, FPURegister rs2, int16_t imm12 )

protected

Definition at line 458 of file base-assembler-riscv.cc.

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GenInstrU()

void v8::internal::AssemblerRiscvBase::GenInstrU ( BaseOpcode opcode, Register rd, int32_t imm20 )

protected

Definition at line 231 of file base-assembler-riscv.cc.

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---

The documentation for this class was generated from the following files:

• src/codegen/riscv/base-assembler-riscv.h
• src/codegen/riscv/base-assembler-riscv.cc