|
| enum | CheckAlignment { NO_CHECK
, CHECK_ALIGNMENT
} |
| |
| enum | OpcodeFormatType { ONE_BYTE_OPCODE
, TWO_BYTE_OPCODE
, TWO_BYTE_DISJOINT_OPCODE
, THREE_NIBBLE_OPCODE
} |
| |
| enum | Type {
kOp6Type
, kOp7Type
, kOp8Type
, kOp10Type
,
kOp12Type
, kOp14Type
, kOp17Type
, kOp22Type
,
kUnsupported = -1
, kRegisterType
, kImmediateType
, kJumpType
,
kUnsupported = -1
, kRType
, kR4Type
, kIType
,
kSType
, kBType
, kUType
, kJType
,
kCRType
, kCIType
, kCSSType
, kCIWType
,
kCLType
, kCSType
, kCAType
, kCBType
,
kCJType
, kVType
, kVLType
, kVSType
,
kVAMOType
, kVIVVType
, kVFVVType
, kVMVVType
,
kVIVIType
, kVIVXType
, kVFVFType
, kVMVXType
,
kVSETType
, kUnsupported = -1
} |
| |
| enum | { kPCReadOffset = 0
} |
| |
| enum | Type {
kOp6Type
, kOp7Type
, kOp8Type
, kOp10Type
,
kOp12Type
, kOp14Type
, kOp17Type
, kOp22Type
,
kUnsupported = -1
, kRegisterType
, kImmediateType
, kJumpType
,
kUnsupported = -1
, kRType
, kR4Type
, kIType
,
kSType
, kBType
, kUType
, kJType
,
kCRType
, kCIType
, kCSSType
, kCIWType
,
kCLType
, kCSType
, kCAType
, kCBType
,
kCJType
, kVType
, kVLType
, kVSType
,
kVAMOType
, kVIVVType
, kVFVVType
, kVMVVType
,
kVIVIType
, kVIVXType
, kVFVFType
, kVMVXType
,
kVSETType
, kUnsupported = -1
} |
| |
| enum | { kPCReadOffset = 0
} |
| |
| enum | Type {
kOp6Type
, kOp7Type
, kOp8Type
, kOp10Type
,
kOp12Type
, kOp14Type
, kOp17Type
, kOp22Type
,
kUnsupported = -1
, kRegisterType
, kImmediateType
, kJumpType
,
kUnsupported = -1
, kRType
, kR4Type
, kIType
,
kSType
, kBType
, kUType
, kJType
,
kCRType
, kCIType
, kCSSType
, kCIWType
,
kCLType
, kCSType
, kCAType
, kCBType
,
kCJType
, kVType
, kVLType
, kVSType
,
kVAMOType
, kVIVVType
, kVFVVType
, kVMVVType
,
kVIVIType
, kVIVXType
, kVFVFType
, kVMVXType
,
kVSETType
, kUnsupported = -1
} |
| |
| Instr | InstructionBits () const |
| |
| V8_EXPORT_PRIVATE void | SetInstructionBits (Instr value, WritableJitAllocation *jit_allocation=nullptr) |
| |
| int | Bit (int nr) const |
| |
| int | Bits (int hi, int lo) const |
| |
| int | BitField (int hi, int lo) const |
| |
| int | ConditionValue () const |
| |
| Condition | ConditionField () const |
| |
| int | TypeValue () const |
| |
| int | SpecialValue () const |
| |
| int | RnValue () const |
| |
| int | RdValue () const |
| |
| int | CoprocessorValue () const |
| |
| int | VnValue () const |
| |
| int | VmValue () const |
| |
| int | VdValue () const |
| |
| int | NValue () const |
| |
| int | MValue () const |
| |
| int | DValue () const |
| |
| int | RtValue () const |
| |
| int | PValue () const |
| |
| int | UValue () const |
| |
| int | Opc1Value () const |
| |
| int | Opc2Value () const |
| |
| int | Opc3Value () const |
| |
| int | SzValue () const |
| |
| int | VLValue () const |
| |
| int | VCValue () const |
| |
| int | VAValue () const |
| |
| int | VBValue () const |
| |
| int | VFPNRegValue (VFPRegPrecision pre) |
| |
| int | VFPMRegValue (VFPRegPrecision pre) |
| |
| int | VFPDRegValue (VFPRegPrecision pre) |
| |
| int | OpcodeValue () const |
| |
| Opcode | OpcodeField () const |
| |
| int | SValue () const |
| |
| int | RmValue () const |
| |
| int | ShiftValue () const |
| |
| ShiftOp | ShiftField () const |
| |
| int | RegShiftValue () const |
| |
| int | RsValue () const |
| |
| int | ShiftAmountValue () const |
| |
| int | RotateValue () const |
| |
| int | Immed8Value () const |
| |
| int | Immed4Value () const |
| |
| int | ImmedMovwMovtValue () const |
| |
| int | PUValue () const |
| |
| int | PUField () const |
| |
| int | BValue () const |
| |
| int | WValue () const |
| |
| int | LValue () const |
| |
| int | Offset12Value () const |
| |
| int | RlistValue () const |
| |
| int | SignValue () const |
| |
| int | HValue () const |
| |
| int | ImmedHValue () const |
| |
| int | ImmedLValue () const |
| |
| int | LinkValue () const |
| |
| int | SImmed24Value () const |
| |
| bool | IsBranch () |
| |
| int | GetBranchOffset () |
| |
| void | SetBranchOffset (int32_t branch_offset, WritableJitAllocation *jit_allocation) |
| |
| SoftwareInterruptCodes | SvcValue () const |
| |
| bool | IsSpecialType0 () const |
| |
| bool | IsMiscType0 () const |
| |
| bool | IsNopLikeType1 () const |
| |
| bool | IsStop () const |
| |
| bool | HasS () const |
| |
| bool | HasB () const |
| |
| bool | HasW () const |
| |
| bool | HasL () const |
| |
| bool | HasU () const |
| |
| bool | HasSign () const |
| |
| bool | HasH () const |
| |
| bool | HasLink () const |
| |
| Float64 | DoubleImmedVmov () const |
| |
| V8_INLINE Instr | InstructionBits () const |
| |
| V8_EXPORT_PRIVATE void | SetInstructionBits (Instr new_instr, WritableJitAllocation *jit_allocation=nullptr) |
| |
| int | Bit (int pos) const |
| |
| uint32_t | Bits (int msb, int lsb) const |
| |
| int32_t | SignedBits (int msb, int lsb) const |
| |
| Instr | Mask (uint32_t mask) const |
| |
| V8_INLINE const Instruction * | following (int count=1) const |
| |
| V8_INLINE Instruction * | following (int count=1) |
| |
| V8_INLINE const Instruction * | preceding (int count=1) const |
| |
| V8_INLINE Instruction * | preceding (int count=1) |
| |
| int | ImmPCRel () const |
| |
| uint64_t | ImmLogical () |
| |
| unsigned | ImmNEONabcdefgh () const |
| |
| float | ImmFP32 () |
| |
| double | ImmFP64 () |
| |
| float | ImmNEONFP32 () const |
| |
| double | ImmNEONFP64 () const |
| |
| unsigned | SizeLS () const |
| |
| unsigned | SizeLSPair () const |
| |
| int | NEONLSIndex (int access_size_shift) const |
| |
| bool | IsCondBranchImm () const |
| |
| bool | IsUncondBranchImm () const |
| |
| bool | IsCompareBranch () const |
| |
| bool | IsTestBranch () const |
| |
| bool | IsImmBranch () const |
| |
| bool | IsLdrLiteral () const |
| |
| bool | IsLdrLiteralX () const |
| |
| bool | IsLdrLiteralW () const |
| |
| bool | IsPCRelAddressing () const |
| |
| bool | IsAdr () const |
| |
| bool | IsBrk () const |
| |
| bool | IsUnresolvedInternalReference () const |
| |
| bool | IsLogicalImmediate () const |
| |
| bool | IsAddSubImmediate () const |
| |
| bool | IsAddSubShifted () const |
| |
| bool | IsAddSubExtended () const |
| |
| bool | IsLoadOrStore () const |
| |
| bool | IsLoad () const |
| |
| bool | IsStore () const |
| |
| Reg31Mode | RdMode () const |
| |
| Reg31Mode | RnMode () const |
| |
| ImmBranchType | BranchType () const |
| |
| int | ImmBranch () const |
| |
| int | ImmUnresolvedInternalReference () const |
| |
| bool | IsUnconditionalBranch () const |
| |
| bool | IsBranchAndLink () const |
| |
| bool | IsBranchAndLinkToRegister () const |
| |
| bool | IsMovz () const |
| |
| bool | IsMovk () const |
| |
| bool | IsMovn () const |
| |
| bool | IsException () const |
| |
| bool | IsPAuth () const |
| |
| bool | IsBti () const |
| |
| bool | IsNop (int n) |
| |
| V8_EXPORT_PRIVATE int64_t | ImmPCOffset () |
| |
| V8_EXPORT_PRIVATE Instruction * | ImmPCOffsetTarget () |
| |
| bool | IsTargetInImmPCOffsetRange (Instruction *target) |
| |
| void | SetImmPCOffsetTarget (Zone *zone, AssemblerOptions options, Instruction *target) |
| |
| void | SetUnresolvedInternalReferenceImmTarget (Zone *zone, AssemblerOptions options, Instruction *target) |
| |
| void | SetImmLLiteral (Instruction *source) |
| |
| uintptr_t | LiteralAddress () |
| |
| V8_INLINE const Instruction * | InstructionAtOffset (int64_t offset, CheckAlignment check=CHECK_ALIGNMENT) const |
| |
| V8_INLINE Instruction * | InstructionAtOffset (int64_t offset, CheckAlignment check=CHECK_ALIGNMENT) |
| |
| V8_INLINE ptrdiff_t | DistanceTo (Instruction *target) |
| |
| void | SetPCRelImmTarget (Zone *zone, AssemblerOptions options, Instruction *target) |
| |
| template<ImmBranchType branch_type> |
| void | SetBranchImmTarget (Instruction *target, WritableJitAllocation *jit_allocation=nullptr) |
| |
| Instr | InstructionBits () const |
| |
| V8_EXPORT_PRIVATE void | SetInstructionBits (Instr value, WritableJitAllocation *jit_allocation=nullptr) |
| |
| int | Bit (int nr) const |
| |
| int | Bits (int hi, int lo) const |
| |
| uint32_t | BitField (int hi, int lo) const |
| |
| int | RSValue () const |
| |
| int | RTValue () const |
| |
| int | RAValue () const |
| |
| int | RBValue () const |
| |
| int | RCValue () const |
| |
| int | OpcodeValue () const |
| |
| uint32_t | OpcodeField () const |
| |
| uint32_t | PrefixOpcodeField () const |
| |
| Opcode | OpcodeBase () const |
| |
| SoftwareInterruptCodes | SvcValue () const |
| |
| template<typename T > |
| T | InstructionBits () const |
| |
| Instr | InstructionBits () const |
| |
| template<typename T > |
| void | SetInstructionBits (T value, WritableJitAllocation *jit_allocation=nullptr) const |
| |
| V8_EXPORT_PRIVATE void | SetInstructionBits (Instr value, WritableJitAllocation *jit_allocation=nullptr) |
| |
| int | Bit (int nr) const |
| |
| int | Bits (int hi, int lo) const |
| |
| template<typename T , typename U > |
| U | Bits (int hi, int lo) const |
| |
| int | BitField (int hi, int lo) const |
| |
| int | InstructionLength () |
| |
| Opcode | S390OpcodeValue () |
| |
| SoftwareInterruptCodes | SvcValue () const |
| |
| int | RjValue () const |
| |
| int | RkValue () const |
| |
| int | RdValue () const |
| |
| int | RdValue () const |
| |
| int | RdValue () const |
| |
| int | Sa2Value () const |
| |
| int | Sa3Value () const |
| |
| int | Ui5Value () const |
| |
| int | Ui6Value () const |
| |
| int | Ui12Value () const |
| |
| int | LsbwValue () const |
| |
| int | MsbwValue () const |
| |
| int | LsbdValue () const |
| |
| int | MsbdValue () const |
| |
| int | CondValue () const |
| |
| int | Si12Value () const |
| |
| int | Si14Value () const |
| |
| int | Si16Value () const |
| |
| int | Si20Value () const |
| |
| int | FdValue () const |
| |
| int | FdValue () const |
| |
| int | FaValue () const |
| |
| int | FjValue () const |
| |
| int | FkValue () const |
| |
| int | CjValue () const |
| |
| int | CdValue () const |
| |
| int | CaValue () const |
| |
| int | CodeValue () const |
| |
| int | Hint5Value () const |
| |
| int | Hint15Value () const |
| |
| int | Offs16Value () const |
| |
| int | Offs21Value () const |
| |
| int | Offs26Value () const |
| |
| int | RjFieldRaw () const |
| |
| int | RkFieldRaw () const |
| |
| int | RdFieldRaw () const |
| |
| int | RdFieldRaw () const |
| |
| int32_t | ImmValue (int bits) const |
| |
| int32_t | ImmValue (int bits) const |
| |
| int32_t | Imm12Value () const |
| |
| int | Imm12Value () const |
| |
| int32_t | Imm14Value () const |
| |
| int32_t | Imm16Value () const |
| |
| int32_t | Imm16Value () const |
| |
| bool | IsTrap () const |
| |
| bool | IsTrap () const |
| |
| bool | IsTrap () const |
| |
| int | RsValue () const |
| |
| int | RtValue () const |
| |
| int | BaseValue () const |
| |
| int | SaValue () const |
| |
| int | LsaSaValue () const |
| |
| int | FunctionValue () const |
| |
| int | FsValue () const |
| |
| int | FtValue () const |
| |
| int | FrValue () const |
| |
| int | WdValue () const |
| |
| int | WsValue () const |
| |
| int | WtValue () const |
| |
| int | Bp2Value () const |
| |
| int | Bp3Value () const |
| |
| int | FCccValue () const |
| |
| int | FBccValue () const |
| |
| int | FBtrueValue () const |
| |
| Opcode | OpcodeFieldRaw () const |
| |
| int | RsFieldRaw () const |
| |
| int | RsFieldRawNoAssert () const |
| |
| int | RtFieldRaw () const |
| |
| int | SaFieldRaw () const |
| |
| int | FunctionFieldRaw () const |
| |
| int | SecondaryValue () const |
| |
| int32_t | Imm9Value () const |
| |
| int32_t | Imm18Value () const |
| |
| int32_t | Imm19Value () const |
| |
| int32_t | Imm21Value () const |
| |
| int32_t | Imm26Value () const |
| |
| int32_t | MsaImm8Value () const |
| |
| int32_t | MsaImm5Value () const |
| |
| int32_t | MsaImm10Value () const |
| |
| int32_t | MsaImmMI10Value () const |
| |
| int32_t | MsaBitDf () const |
| |
| int32_t | MsaBitMValue () const |
| |
| int32_t | MsaElmDf () const |
| |
| int32_t | MsaElmNValue () const |
| |
| bool | IsForbiddenAfterBranch () const |
| |
| bool | IsForbiddenInBranchDelay () const |
| |
| bool | IsLinkingInstruction () const |
| |
| bool | IsMSABranchInstr () const |
| |
| bool | IsMSAInstr () const |
| |
| uint32_t | OperandFunct3 () const |
| |
| bool | IsLoad () |
| |
| bool | IsStore () |
| |
| int | BaseOpcode () const |
| |
| int | RvcOpcode () const |
| |
| int | Rs1Value () const |
| |
| int | Rs2Value () const |
| |
| int | Rs3Value () const |
| |
| int | Vs1Value () const |
| |
| int | Vs2Value () const |
| |
| int | VdValue () const |
| |
| int | RvcRs1Value () const |
| |
| int | RvcRdValue () const |
| |
| int | RvcRs2Value () const |
| |
| int | RvcRs1sValue () const |
| |
| int | RvcRs2sValue () const |
| |
| int | Funct7Value () const |
| |
| int | Funct3Value () const |
| |
| int | Funct5Value () const |
| |
| int | RvcFunct6Value () const |
| |
| int | RvcFunct4Value () const |
| |
| int | RvcFunct3Value () const |
| |
| int | RvcFunct2Value () const |
| |
| int | RvcFunct2BValue () const |
| |
| int | CsrValue () const |
| |
| int | RoundMode () const |
| |
| int | MemoryOrder (bool is_pred) const |
| |
| int32_t | Imm12SExtValue () const |
| |
| int | BranchOffset () const |
| |
| int | StoreOffset () const |
| |
| int | Imm20UValue () const |
| |
| int | Imm20JValue () const |
| |
| bool | IsArithShift () const |
| |
| int | Shamt () const |
| |
| int | Shamt32 () const |
| |
| int | RvcImm6Value () const |
| |
| int | RvcImm6Addi16spValue () const |
| |
| int | RvcImm8Addi4spnValue () const |
| |
| int | RvcShamt6 () const |
| |
| int | RvcImm6LwspValue () const |
| |
| int | RvcImm6LdspValue () const |
| |
| int | RvcImm6SwspValue () const |
| |
| int | RvcImm6SdspValue () const |
| |
| int | RvcImm5WValue () const |
| |
| int | RvcImm5DValue () const |
| |
| int | RvcImm11CJValue () const |
| |
| int | RvcImm8BValue () const |
| |
| int | vl_vs_width () |
| |
| uint32_t | Rvvzimm () const |
| |
| uint32_t | Rvvuimm () const |
| |
| uint32_t | RvvVsew () const |
| |
| uint32_t | RvvVlmul () const |
| |
| uint8_t | RvvVM () const |
| |
| const char * | RvvSEW () const |
| |
| const char * | RvvLMUL () const |
| |
| int32_t | RvvSimm5 () const |
| |
| uint32_t | RvvUimm5 () const |
| |
| bool | AqValue () const |
| |
| bool | RlValue () const |
| |
| bool | IsAUIPC () const |
| |
| Instr | InstructionBits () const |
| |
| V8_EXPORT_PRIVATE void | SetInstructionBits (Instr new_instr, WritableJitAllocation *jit_allocation=nullptr) |
| |
| int | Bit (int nr) const |
| |
| int | Bits (int hi, int lo) const |
| |
| int | RjFieldRawNoAssert () const |
| |
| Type | InstructionType () const |
| |
| Instr | InstructionBits () const |
| |
| V8_EXPORT_PRIVATE void | SetInstructionBits (Instr new_instr, WritableJitAllocation *jit_allocation=nullptr) |
| |
| int | Bit (int nr) const |
| |
| int | Bits (int hi, int lo) const |
| |
| Opcode | OpcodeValue () const |
| |
| int | FunctionFieldRaw () const |
| |
| Opcode | OpcodeFieldRaw () const |
| |
| int | RsFieldRawNoAssert () const |
| |
| int | SaFieldRaw () const |
| |
| Type | InstructionType () const |
| |
| MSAMinorOpcode | MSAMinorOpcodeField () const |
| |
| bool | IsIllegalInstruction () const |
| |
| bool | IsShortInstruction () const |
| |
| uint8_t | InstructionSize () const |
| |
| Instr | InstructionBits () const |
| |
| void | SetInstructionBits (Instr value) |
| |
| int | Bit (int nr) const |
| |
| int | Bits (int hi, int lo) const |
| |
| BaseOpcode | BaseOpcodeValue () const |
| |
| BaseOpcode | BaseOpcodeFieldRaw () const |
| |
| int | Funct7FieldRaw () const |
| |
| int | Funct6FieldRaw () const |
| |
| int | Funct3FieldRaw () const |
| |
| int | Rs1FieldRawNoAssert () const |
| |
| int | Rs2FieldRawNoAssert () const |
| |
| int | Rs3FieldRawNoAssert () const |
| |
| int32_t | ITypeBits () const |
| |
| int32_t | InstructionOpcodeType () const |
| |
| Type | InstructionType () const |
| |
| | InstructionBase () |
| |
| | InstructionBase () |
| |
| | InstructionBase () |
| |
| static Instruction * | At (Address pc) |
| |
| static float | Imm8ToFP32 (uint32_t imm8) |
| |
| static double | Imm8ToFP64 (uint32_t imm8) |
| |
| static constexpr int | ImmBranchRangeBitwidth (ImmBranchType branch_type) |
| |
| static constexpr int32_t | ImmBranchRange (ImmBranchType branch_type) |
| |
| static constexpr bool | IsValidImmPCOffset (ImmBranchType branch_type, ptrdiff_t offset) |
| |
| template<typename T > |
| static V8_INLINE Instruction * | Cast (T src) |
| |
| static bool | IsValidPCRelOffset (ptrdiff_t offset) |
| |
| static Instruction * | At (uint8_t *pc) |
| |
| static Instruction * | At (uint8_t *pc) |
| |
| static int | Bit (Instr instr, int nr) |
| |
| static int | Bits (Instr instr, int hi, int lo) |
| |
| static uint32_t | BitField (Instr instr, int hi, int lo) |
| |
| static Instruction * | At (uint8_t *pc) |
| |
| static Instruction * | At (uint8_t *pc) |
| |
| static int | Bit (Instr instr, int nr) |
| |
| static int | Bits (Instr instr, int hi, int lo) |
| |
| static int | BitField (Instr instr, int hi, int lo) |
| |
| static int | InstructionLength (const uint8_t *instr) |
| |
| static uint64_t | InstructionBits (const uint8_t *instr) |
| |
| template<typename T > |
| static T | InstructionBits (const uint8_t *instr) |
| |
| template<typename T > |
| static void | SetInstructionBits (uint8_t *instr, T value, WritableJitAllocation *jit_allocation=nullptr) |
| |
| static OpcodeFormatType | getOpcodeFormatType (const uint8_t *instr) |
| |
| static Opcode | S390OpcodeValue (const uint8_t *instr) |
| |
| static Instruction * | At (uint8_t *pc) |
| |
| static bool | IsForbiddenAfterBranchInstr (Instr instr) |
| |
| static constexpr int | kPcLoadDelta = 8 |
| |
| static const int | ImmPCRelRangeBitwidth = 21 |
| |
| static OpcodeFormatType | OpcodeFormatTable [256] |
| |
| static constexpr uint64_t | kOpcodeImmediateTypeMask |
| |
| static const uint64_t | kFunctionFieldRegisterTypeMask |
| |