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constant-riscv-i.h
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1// Copyright 2022 the V8 project authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
4
5#ifndef V8_CODEGEN_RISCV_CONSTANT_RISCV_I_H_
6#define V8_CODEGEN_RISCV_CONSTANT_RISCV_I_H_
7
8#include "src/codegen/riscv/base-constants-riscv.h"
9namespace v8 {
10namespace internal {
11
12// Note use RO (RiscV Opcode) prefix
13// RV32I Base Instruction Set
14constexpr Opcode RO_LUI = LUI;
15constexpr Opcode RO_AUIPC = AUIPC;
16constexpr Opcode RO_JAL = JAL;
17constexpr Opcode RO_JALR = JALR | (0b000 << kFunct3Shift);
18constexpr Opcode RO_BEQ = BRANCH | (0b000 << kFunct3Shift);
19constexpr Opcode RO_BNE = BRANCH | (0b001 << kFunct3Shift);
20constexpr Opcode RO_BLT = BRANCH | (0b100 << kFunct3Shift);
21constexpr Opcode RO_BGE = BRANCH | (0b101 << kFunct3Shift);
22constexpr Opcode RO_BLTU = BRANCH | (0b110 << kFunct3Shift);
23constexpr Opcode RO_BGEU = BRANCH | (0b111 << kFunct3Shift);
24constexpr Opcode RO_LB = LOAD | (0b000 << kFunct3Shift);
25constexpr Opcode RO_LH = LOAD | (0b001 << kFunct3Shift);
26constexpr Opcode RO_LW = LOAD | (0b010 << kFunct3Shift);
27constexpr Opcode RO_LBU = LOAD | (0b100 << kFunct3Shift);
28constexpr Opcode RO_LHU = LOAD | (0b101 << kFunct3Shift);
29constexpr Opcode RO_SB = STORE | (0b000 << kFunct3Shift);
30constexpr Opcode RO_SH = STORE | (0b001 << kFunct3Shift);
31constexpr Opcode RO_SW = STORE | (0b010 << kFunct3Shift);
32
33constexpr Opcode RO_ADDI = OP_IMM | (0b000 << kFunct3Shift);
34constexpr Opcode RO_SLTI = OP_IMM | (0b010 << kFunct3Shift);
35constexpr Opcode RO_SLTIU = OP_IMM | (0b011 << kFunct3Shift);
36constexpr Opcode RO_XORI = OP_IMM | (0b100 << kFunct3Shift);
37constexpr Opcode RO_ORI = OP_IMM | (0b110 << kFunct3Shift);
38constexpr Opcode RO_ANDI = OP_IMM | (0b111 << kFunct3Shift);
39
40constexpr Opcode OP_SHL = OP_IMM | (0b001 << kFunct3Shift);
41constexpr Opcode RO_SLLI = OP_SHL | (0b000000 << kFunct6Shift);
42
43constexpr Opcode OP_SHR = OP_IMM | (0b101 << kFunct3Shift);
44constexpr Opcode RO_SRLI = OP_SHR | (0b000000 << kFunct6Shift);
45constexpr Opcode RO_SRAI = OP_SHR | (0b010000 << kFunct6Shift);
46
47constexpr Opcode RO_ADD =
48 OP | (0b000 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
49constexpr Opcode RO_SUB =
50 OP | (0b000 << kFunct3Shift) | (0b0100000 << kFunct7Shift);
51constexpr Opcode RO_SLL =
52 OP | (0b001 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
53constexpr Opcode RO_SLT =
54 OP | (0b010 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
55constexpr Opcode RO_SLTU =
56 OP | (0b011 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
57constexpr Opcode RO_XOR =
58 OP | (0b100 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
59constexpr Opcode RO_SRL =
60 OP | (0b101 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
61constexpr Opcode RO_SRA =
62 OP | (0b101 << kFunct3Shift) | (0b0100000 << kFunct7Shift);
63constexpr Opcode RO_OR =
64 OP | (0b110 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
65constexpr Opcode RO_AND =
66 OP | (0b111 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
67constexpr Opcode RO_FENCE = MISC_MEM | (0b000 << kFunct3Shift);
68constexpr Opcode RO_ECALL = SYSTEM | (0b000 << kFunct3Shift);
69// RO_EBREAK = SYSTEM | (0b000 << kFunct3Shift), // Same as ECALL, use imm12
70
71#if V8_TARGET_ARCH_RISCV64
72 // RV64I Base Instruction Set (in addition to RV32I)
73constexpr Opcode RO_LWU = LOAD | (0b110 << kFunct3Shift);
74constexpr Opcode RO_LD = LOAD | (0b011 << kFunct3Shift);
75constexpr Opcode RO_SD = STORE | (0b011 << kFunct3Shift);
76constexpr Opcode RO_ADDIW = OP_IMM_32 | (0b000 << kFunct3Shift);
77
78constexpr Opcode OP_SHLW = OP_IMM_32 | (0b001 << kFunct3Shift);
79constexpr Opcode RO_SLLIW = OP_SHLW | (0b0000000 << kFunct7Shift);
80
81constexpr Opcode OP_SHRW = OP_IMM_32 | (0b101 << kFunct3Shift);
82constexpr Opcode RO_SRLIW = OP_SHRW | (0b0000000 << kFunct7Shift);
83constexpr Opcode RO_SRAIW = OP_SHRW | (0b0100000 << kFunct7Shift);
84
85constexpr Opcode RO_ADDW =
86 OP_32 | (0b000 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
87constexpr Opcode RO_SUBW =
88 OP_32 | (0b000 << kFunct3Shift) | (0b0100000 << kFunct7Shift);
89constexpr Opcode RO_SLLW =
90 OP_32 | (0b001 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
91constexpr Opcode RO_SRLW =
92 OP_32 | (0b101 << kFunct3Shift) | (0b0000000 << kFunct7Shift);
93constexpr Opcode RO_SRAW =
94 OP_32 | (0b101 << kFunct3Shift) | (0b0100000 << kFunct7Shift);
95#endif
96// clang-format on
97} // namespace internal
98} // namespace v8
99
100#endif // V8_CODEGEN_RISCV_CONSTANT_RISCV_I_H_
v8::internal::RO_BGE
constexpr Opcode RO_BGE
Definition constant-riscv-i.h:21
v8::internal::RO_XORI
constexpr Opcode RO_XORI
Definition constant-riscv-i.h:36
v8::internal::RO_SRA
constexpr Opcode RO_SRA
Definition constant-riscv-i.h:61
v8::internal::RO_SLTIU
constexpr Opcode RO_SLTIU
Definition constant-riscv-i.h:35
v8::internal::RO_LBU
constexpr Opcode RO_LBU
Definition constant-riscv-i.h:27
v8::internal::RO_AUIPC
constexpr Opcode RO_AUIPC
Definition constant-riscv-i.h:15
v8::internal::RO_SRAI
constexpr Opcode RO_SRAI
Definition constant-riscv-i.h:45
v8::internal::RO_JAL
constexpr Opcode RO_JAL
Definition constant-riscv-i.h:16
v8::internal::RO_SRLI
constexpr Opcode RO_SRLI
Definition constant-riscv-i.h:44
v8::internal::RO_JALR
constexpr Opcode RO_JALR
Definition constant-riscv-i.h:17
v8::internal::RO_SUB
constexpr Opcode RO_SUB
Definition constant-riscv-i.h:49
v8::internal::RO_LHU
constexpr Opcode RO_LHU
Definition constant-riscv-i.h:28
v8::internal::RO_SB
constexpr Opcode RO_SB
Definition constant-riscv-i.h:29
v8::internal::RO_XOR
constexpr Opcode RO_XOR
Definition constant-riscv-i.h:57
v8::internal::RO_BLTU
constexpr Opcode RO_BLTU
Definition constant-riscv-i.h:22
v8::internal::RO_BEQ
constexpr Opcode RO_BEQ
Definition constant-riscv-i.h:18
v8::internal::RO_SH
constexpr Opcode RO_SH
Definition constant-riscv-i.h:30
v8::internal::RO_LH
constexpr Opcode RO_LH
Definition constant-riscv-i.h:25
v8::internal::RO_ECALL
constexpr Opcode RO_ECALL
Definition constant-riscv-i.h:68
v8::internal::JAL
constexpr Opcode JAL
Definition constants-mips64.h:426
v8::internal::RO_SLTI
constexpr Opcode RO_SLTI
Definition constant-riscv-i.h:34
v8::internal::RO_BGEU
constexpr Opcode RO_BGEU
Definition constant-riscv-i.h:23
v8::internal::OP_SHL
constexpr Opcode OP_SHL
Definition constant-riscv-i.h:40
v8::internal::LUI
constexpr Opcode LUI
Definition constants-mips64.h:439
v8::internal::RO_SLLI
constexpr Opcode RO_SLLI
Definition constant-riscv-i.h:41
v8::internal::RO_LUI
constexpr Opcode RO_LUI
Definition constant-riscv-i.h:14
v8::internal::RO_ORI
constexpr Opcode RO_ORI
Definition constant-riscv-i.h:37
v8::internal::RO_BLT
constexpr Opcode RO_BLT
Definition constant-riscv-i.h:20
v8::internal::RO_LW
constexpr Opcode RO_LW
Definition constant-riscv-i.h:26
v8::internal::RO_SLTU
constexpr Opcode RO_SLTU
Definition constant-riscv-i.h:55
v8::internal::RO_ADDI
constexpr Opcode RO_ADDI
Definition constant-riscv-i.h:33
v8::internal::RO_SLL
constexpr Opcode RO_SLL
Definition constant-riscv-i.h:51
v8::internal::RO_SRL
constexpr Opcode RO_SRL
Definition constant-riscv-i.h:59
v8::internal::RO_BNE
constexpr Opcode RO_BNE
Definition constant-riscv-i.h:19
v8::internal::RO_OR
constexpr Opcode RO_OR
Definition constant-riscv-i.h:63
v8::internal::RO_AND
constexpr Opcode RO_AND
Definition constant-riscv-i.h:65
v8::internal::RO_LB
constexpr Opcode RO_LB
Definition constant-riscv-i.h:24
v8::internal::RO_ANDI
constexpr Opcode RO_ANDI
Definition constant-riscv-i.h:38
v8::internal::RO_FENCE
constexpr Opcode RO_FENCE
Definition constant-riscv-i.h:67
v8::internal::RO_ADD
constexpr Opcode RO_ADD
Definition constant-riscv-i.h:47
v8::internal::OP_SHR
constexpr Opcode OP_SHR
Definition constant-riscv-i.h:43
v8::internal::RO_SW
constexpr Opcode RO_SW
Definition constant-riscv-i.h:31
v8::internal::RO_SLT
constexpr Opcode RO_SLT
Definition constant-riscv-i.h:53