v8
V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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extension-riscv-m.cc
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1// Copyright 2022 the V8 project authors. All rights reserved.
2// Use of this source code is governed by a BSD-style license that can be
3// found in the LICENSE file.
5
6namespace v8 {
7namespace internal {
8// RV32M Standard Extension
9
11 GenInstrALU_rr(0b0000001, 0b000, rd, rs1, rs2);
12}
13
15 GenInstrALU_rr(0b0000001, 0b001, rd, rs1, rs2);
16}
17
19 GenInstrALU_rr(0b0000001, 0b010, rd, rs1, rs2);
20}
21
23 GenInstrALU_rr(0b0000001, 0b011, rd, rs1, rs2);
24}
25
27 GenInstrALU_rr(0b0000001, 0b100, rd, rs1, rs2);
28}
29
31 GenInstrALU_rr(0b0000001, 0b101, rd, rs1, rs2);
32}
33
35 GenInstrALU_rr(0b0000001, 0b110, rd, rs1, rs2);
36}
37
39 GenInstrALU_rr(0b0000001, 0b111, rd, rs1, rs2);
40}
41
42#ifdef V8_TARGET_ARCH_RISCV64
43// RV64M Standard Extension (in addition to RV32M)
44
45void AssemblerRISCVM::mulw(Register rd, Register rs1, Register rs2) {
46 GenInstrALUW_rr(0b0000001, 0b000, rd, rs1, rs2);
47}
48
49void AssemblerRISCVM::divw(Register rd, Register rs1, Register rs2) {
50 GenInstrALUW_rr(0b0000001, 0b100, rd, rs1, rs2);
51}
52
53void AssemblerRISCVM::divuw(Register rd, Register rs1, Register rs2) {
54 GenInstrALUW_rr(0b0000001, 0b101, rd, rs1, rs2);
55}
56
57void AssemblerRISCVM::remw(Register rd, Register rs1, Register rs2) {
58 GenInstrALUW_rr(0b0000001, 0b110, rd, rs1, rs2);
59}
60
61void AssemblerRISCVM::remuw(Register rd, Register rs1, Register rs2) {
62 GenInstrALUW_rr(0b0000001, 0b111, rd, rs1, rs2);
63}
64#endif
65} // namespace internal
66} // namespace v8
void mulhu(Register rd, Register rs1, Register rs2)
void divu(Register rd, Register rs1, Register rs2)
void mulh(Register rd, Register rs1, Register rs2)
void mulhsu(Register rd, Register rs1, Register rs2)
void rem(Register rd, Register rs1, Register rs2)
void remu(Register rd, Register rs1, Register rs2)
void mul(Register rd, Register rs1, Register rs2)
void div(Register rd, Register rs1, Register rs2)
void GenInstrALUW_rr(uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)
void GenInstrALU_rr(uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)