v8
V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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instruction-selector-riscv.h File Reference
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Classes

class  v8::internal::compiler::RiscvOperandGeneratorT
 

Namespaces

namespace  v8
 
namespace  v8::internal
 
namespace  v8::internal::compiler
 

Macros

#define TRACE(...)
 
#define SIMD_INT_TYPE_LIST(V)
 
#define SIMD_TYPE_LIST(V)
 
#define SIMD_UNOP_LIST2(V)
 
#define SIMD_UNOP_LIST(V)
 
#define SIMD_SHIFT_OP_LIST(V)
 
#define SIMD_BINOP_LIST(V)
 
#define UNIMPLEMENTED_SIMD_FP16_OP_LIST(V)
 
#define SIMD_VISIT_UNIMPL_FP16_OP(Name)
 
#define SIMD_VISIT_EXTRACT_LANE(Type, Sign)
 
#define SIMD_VISIT_REPLACE_LANE(Type)
 
#define SIMD_VISIT_UNOP(Name, instruction)
 
#define SIMD_VISIT_SHIFT_OP(Name)
 
#define SIMD_VISIT_BINOP_RVV(Name, instruction, VSEW, LMUL)
 
#define SIMD_VISIT_UNOP2(Name, instruction, VSEW, LMUL)
 
#define SIMD_VISIT_SELECT_LANE(Name)
 
#define VISIT_SIMD_QFMOP(Name, instruction)
 
#define VISIT_BIMASK(TYPE, VSEW, LMUL)
 
#define VISIT_EXT_MUL(OPCODE1, OPCODE2, TYPE)
 

Functions

static void v8::internal::compiler::VisitRR (InstructionSelectorT *selector, ArchOpcode opcode, OpIndex node)
 
void v8::internal::compiler::VisitRR (InstructionSelectorT *selector, InstructionCode opcode, OpIndex node)
 
static void v8::internal::compiler::VisitRRI (InstructionSelectorT *selector, ArchOpcode opcode, OpIndex node)
 
static void v8::internal::compiler::VisitSimdShift (InstructionSelectorT *selector, ArchOpcode opcode, OpIndex node)
 
static void v8::internal::compiler::VisitRRIR (InstructionSelectorT *selector, ArchOpcode opcode, OpIndex node)
 
void v8::internal::compiler::VisitRRR (InstructionSelectorT *selector, InstructionCode opcode, OpIndex node, typename OperandGeneratorT::RegisterUseKind kind=OperandGeneratorT::RegisterUseKind::kUseRegister)
 
static void v8::internal::compiler::VisitUniqueRRR (InstructionSelectorT *selector, ArchOpcode opcode, OpIndex node)
 
void v8::internal::compiler::VisitRRRR (InstructionSelectorT *selector, ArchOpcode opcode, OpIndex node)
 
static void v8::internal::compiler::VisitRRO (InstructionSelectorT *selector, ArchOpcode opcode, OpIndex node)
 
bool v8::internal::compiler::TryMatchImmediate (InstructionSelectorT *selector, InstructionCode *opcode_return, OpIndex node, size_t *input_count_return, InstructionOperand *inputs)
 
template<typename Matcher >
static void v8::internal::compiler::VisitBinop (InstructionSelectorT *selector, OpIndex node, InstructionCode opcode, bool has_reverse_opcode, InstructionCode reverse_opcode, FlagsContinuationT *cont)
 
template<typename Matcher >
static void v8::internal::compiler::VisitBinop (InstructionSelectorT *selector, OpIndex node, InstructionCode opcode, bool has_reverse_opcode, InstructionCode reverse_opcode)
 
template<typename Matcher >
static void v8::internal::compiler::VisitBinop (InstructionSelectorT *selector, OpIndex node, InstructionCode opcode, FlagsContinuationT *cont)
 
template<typename Matcher >
static void v8::internal::compiler::VisitBinop (InstructionSelectorT *selector, OpIndex node, InstructionCode opcode)
 
void v8::internal::compiler::EmitS128Load (InstructionSelectorT *selector, OpIndex node, InstructionCode opcode, VSew sew, Vlmul lmul)
 
static Instructionv8::internal::compiler::VisitCompare (InstructionSelectorT *selector, InstructionCode opcode, InstructionOperand left, InstructionOperand right, FlagsContinuationT *cont)
 
static Instructionv8::internal::compiler::VisitWordCompareZero (InstructionSelectorT *selector, InstructionOperand value, FlagsContinuationT *cont)
 
void v8::internal::compiler::VisitFloat32Compare (InstructionSelectorT *selector, OpIndex node, FlagsContinuationT *cont)
 
void v8::internal::compiler::VisitFloat64Compare (InstructionSelectorT *selector, OpIndex node, FlagsContinuationT *cont)
 
Instructionv8::internal::compiler::VisitWordCompare (InstructionSelectorT *selector, OpIndex node, InstructionCode opcode, FlagsContinuationT *cont, bool commutative)
 
void v8::internal::EmitWordCompareZero (InstructionSelectorT *selector, OpIndex value, FlagsContinuationT *cont)
 

Macro Definition Documentation

◆ SIMD_BINOP_LIST

#define SIMD_BINOP_LIST ( V)

Definition at line 955 of file instruction-selector-riscv.h.

◆ SIMD_INT_TYPE_LIST

#define SIMD_INT_TYPE_LIST ( V)
Value:
V(I64x2, E64, m1) \
V(I32x4, E32, m1) \
V(I16x8, E16, m1) \
V(I8x16, E8, m1)
#define V(Name)

Definition at line 871 of file instruction-selector-riscv.h.

◆ SIMD_SHIFT_OP_LIST

#define SIMD_SHIFT_OP_LIST ( V)
Value:
V(I64x2Shl) \
V(I64x2ShrS) \
V(I64x2ShrU) \
V(I32x4Shl) \
V(I32x4ShrS) \
V(I32x4ShrU) \
V(I16x8Shl) \
V(I16x8ShrS) \
V(I16x8ShrU) \
V(I8x16Shl) \
V(I8x16ShrS) \
V(I8x16ShrU)

Definition at line 941 of file instruction-selector-riscv.h.

◆ SIMD_TYPE_LIST

#define SIMD_TYPE_LIST ( V)
Value:
V(F32x4) \
V(I64x2) \
V(I32x4) \
V(I16x8) \
V(I8x16)

Definition at line 877 of file instruction-selector-riscv.h.

◆ SIMD_UNOP_LIST

#define SIMD_UNOP_LIST ( V)

Definition at line 906 of file instruction-selector-riscv.h.

◆ SIMD_UNOP_LIST2

#define SIMD_UNOP_LIST2 ( V)
Value:
V(F32x4Splat, kRiscvVfmvVf, E32, m1) \
V(I8x16Neg, kRiscvVnegVv, E8, m1) \
V(I16x8Neg, kRiscvVnegVv, E16, m1) \
V(I32x4Neg, kRiscvVnegVv, E32, m1) \
V(I64x2Neg, kRiscvVnegVv, E64, m1) \
V(I8x16Splat, kRiscvVmv, E8, m1) \
V(I16x8Splat, kRiscvVmv, E16, m1) \
V(I32x4Splat, kRiscvVmv, E32, m1) \
V(I64x2Splat, kRiscvVmv, E64, m1) \
V(F32x4Neg, kRiscvVfnegVv, E32, m1) \
V(F64x2Neg, kRiscvVfnegVv, E64, m1) \
V(F64x2Splat, kRiscvVfmvVf, E64, m1) \
V(I32x4AllTrue, kRiscvVAllTrue, E32, m1) \
V(I16x8AllTrue, kRiscvVAllTrue, E16, m1) \
V(I8x16AllTrue, kRiscvVAllTrue, E8, m1) \
V(I64x2AllTrue, kRiscvVAllTrue, E64, m1) \
V(I64x2Abs, kRiscvVAbs, E64, m1) \
V(I32x4Abs, kRiscvVAbs, E32, m1) \
V(I16x8Abs, kRiscvVAbs, E16, m1) \
V(I8x16Abs, kRiscvVAbs, E8, m1)

Definition at line 884 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_BINOP_RVV

#define SIMD_VISIT_BINOP_RVV ( Name,
instruction,
VSEW,
LMUL )
Value:
\
void InstructionSelectorT::Visit##Name(OpIndex node) { \
RiscvOperandGeneratorT g(this); \
this->Emit(instruction, g.DefineAsRegister(node), \
g.UseRegister(this->input_at(node, 0)), \
g.UseRegister(this->input_at(node, 1)), g.UseImmediate(VSEW), \
g.UseImmediate(LMUL)); \
}

Definition at line 1140 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_EXTRACT_LANE

#define SIMD_VISIT_EXTRACT_LANE ( Type,
Sign )
Value:
\
void InstructionSelectorT::Visit##Type##ExtractLane##Sign(OpIndex node) { \
VisitRRI(this, kRiscv##Type##ExtractLane##Sign, node); \
}

Definition at line 1100 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_REPLACE_LANE

#define SIMD_VISIT_REPLACE_LANE ( Type)
Value:
\
void InstructionSelectorT::Visit##Type##ReplaceLane(OpIndex node) { \
VisitRRIR(this, kRiscv##Type##ReplaceLane, node); \
}

Definition at line 1115 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_SELECT_LANE

#define SIMD_VISIT_SELECT_LANE ( Name)
Value:
\
void InstructionSelectorT::Visit##Name(OpIndex node) { \
VisitRRRR(this, kRiscvS128Select, node); \
}

Definition at line 1167 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_SHIFT_OP

#define SIMD_VISIT_SHIFT_OP ( Name)
Value:
\
void InstructionSelectorT::Visit##Name(OpIndex node) { \
VisitSimdShift(this, kRiscv##Name, node); \
}

Definition at line 1132 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_UNIMPL_FP16_OP

#define SIMD_VISIT_UNIMPL_FP16_OP ( Name)
Value:
\
void InstructionSelectorT::Visit##Name(OpIndex node) { UNIMPLEMENTED(); }
#define UNIMPLEMENTED()
Definition logging.h:66

Definition at line 1056 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_UNOP

#define SIMD_VISIT_UNOP ( Name,
instruction )
Value:
\
void InstructionSelectorT::Visit##Name(OpIndex node) { \
VisitRR(this, instruction, node); \
}

Definition at line 1124 of file instruction-selector-riscv.h.

◆ SIMD_VISIT_UNOP2

#define SIMD_VISIT_UNOP2 ( Name,
instruction,
VSEW,
LMUL )
Value:
\
void InstructionSelectorT::Visit##Name(OpIndex node) { \
RiscvOperandGeneratorT g(this); \
this->Emit(instruction, g.DefineAsRegister(node), \
g.UseRegister(this->input_at(node, 0)), g.UseImmediate(VSEW), \
g.UseImmediate(LMUL)); \
}

Definition at line 1152 of file instruction-selector-riscv.h.

◆ TRACE

#define TRACE ( ...)
Value:
PrintF(__VA_ARGS__)

Definition at line 28 of file instruction-selector-riscv.h.

◆ UNIMPLEMENTED_SIMD_FP16_OP_LIST

#define UNIMPLEMENTED_SIMD_FP16_OP_LIST ( V)

Definition at line 1023 of file instruction-selector-riscv.h.

◆ VISIT_BIMASK

#define VISIT_BIMASK ( TYPE,
VSEW,
LMUL )
Value:
\
void InstructionSelectorT::Visit##TYPE##BitMask(OpIndex node) { \
RiscvOperandGeneratorT g(this); \
InstructionOperand temp = g.TempFpRegister(v16); \
this->Emit(kRiscvVmslt, temp, g.UseRegister(this->input_at(node, 0)), \
g.UseImmediate(0), g.UseImmediate(VSEW), g.UseImmediate(m1), \
g.UseImmediate(true)); \
this->Emit(kRiscvVmvXs, g.DefineAsRegister(node), temp, \
g.UseImmediate(E32), g.UseImmediate(m1)); \
}

Definition at line 1613 of file instruction-selector-riscv.h.

◆ VISIT_EXT_MUL

#define VISIT_EXT_MUL ( OPCODE1,
OPCODE2,
TYPE )

Definition at line 1689 of file instruction-selector-riscv.h.

◆ VISIT_SIMD_QFMOP

#define VISIT_SIMD_QFMOP ( Name,
instruction )
Value:
\
void InstructionSelectorT::Visit##Name(OpIndex node) { \
VisitRRRR(this, instruction, node); \
}

Definition at line 1178 of file instruction-selector-riscv.h.