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V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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liftoff-assembler-loong64-inl.h File Reference
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Namespaces

namespace  v8
 
namespace  v8::internal
 
namespace  v8::internal::wasm
 
namespace  v8::internal::wasm::liftoff
 

Macros

#define ASSEMBLE_ATOMIC_BINOP_EXT(load_linked, store_conditional, size, bin_instr, aligned)
 
#define ATOMIC_BINOP_CASE(name, inst32, inst64, opcode)
 
#define ASSEMBLE_ATOMIC_BINOP(load_linked, store_conditional, bin_instr)
 
#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(load_linked, store_conditional, size, aligned)
 
#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(load_linked, store_conditional)
 
#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT( load_linked, store_conditional, size, aligned)
 
#define I32_BINOP(name, instruction)
 
#define I32_BINOP_I(name, instruction)
 
#define I32_SHIFTOP(name, instruction)
 
#define I32_SHIFTOP_I(name, instruction, instruction1)
 
#define I64_BINOP(name, instruction)
 
#define I64_BINOP_I(name, instruction)
 
#define I64_SHIFTOP(name, instruction)
 
#define I64_SHIFTOP_I(name, instruction, instructioni)
 
#define FP_BINOP(name, instruction)
 
#define FP_UNOP(name, instruction)
 
#define FP_UNOP_RETURN_TRUE(name, instruction)
 
#define SIMD_BINOP(name1, name2)
 
#define SIMD_BINOP(name1, name2)
 

Functions

MemOperand v8::internal::wasm::liftoff::GetStackSlot (int offset)
 
MemOperand v8::internal::wasm::liftoff::GetInstanceDataOperand ()
 
template<typename T >
MemOperand v8::internal::wasm::liftoff::GetMemOp (LiftoffAssembler *assm, Register addr, Register offset, T offset_imm, bool i64_offset=false, unsigned shift_amount=0)
 
void v8::internal::wasm::liftoff::Load (LiftoffAssembler *assm, LiftoffRegister dst, MemOperand src, ValueKind kind)
 
void v8::internal::wasm::liftoff::Store (LiftoffAssembler *assm, MemOperand dst, LiftoffRegister src, ValueKind kind)
 
void v8::internal::wasm::liftoff::Store (LiftoffAssembler *assm, Register base, int32_t offset, LiftoffRegister src, ValueKind kind)
 
void v8::internal::wasm::liftoff::push (LiftoffAssembler *assm, LiftoffRegister reg, ValueKind kind)
 
void v8::internal::wasm::liftoff::StoreToMemory (LiftoffAssembler *assm, MemOperand dst, const LiftoffAssembler::VarState &src)
 
FPUCondition v8::internal::wasm::liftoff::ConditionToConditionCmpFPU (Condition condition, bool *predicate)
 

Macro Definition Documentation

◆ ASSEMBLE_ATOMIC_BINOP

#define ASSEMBLE_ATOMIC_BINOP ( load_linked,
store_conditional,
bin_instr )
Value:
do { \
Label binop; \
dbar(0); \
bind(&binop); \
load_linked(result.gp(), MemOperand(temp0, 0)); \
bin_instr(temp1, result.gp(), Operand(value.gp())); \
store_conditional(temp1, MemOperand(temp0, 0)); \
BranchShort(&binop, eq, temp1, Operand(zero_reg)); \
dbar(0); \
} while (0)
ZoneVector< RpoNumber > & result

Definition at line 841 of file liftoff-assembler-loong64-inl.h.

◆ ASSEMBLE_ATOMIC_BINOP_EXT

#define ASSEMBLE_ATOMIC_BINOP_EXT ( load_linked,
store_conditional,
size,
bin_instr,
aligned )
Value:
do { \
Label binop; \
andi(temp3, temp0, aligned); \
Sub_d(temp0, temp0, Operand(temp3)); \
slli_w(temp3, temp3, 3); \
dbar(0); \
bind(&binop); \
load_linked(temp1, MemOperand(temp0, 0)); \
ExtractBits(result.gp(), temp1, temp3, size, false); \
bin_instr(temp2, result.gp(), Operand(value.gp())); \
InsertBits(temp1, temp2, temp3, size); \
store_conditional(temp1, MemOperand(temp0, 0)); \
BranchShort(&binop, eq, temp1, Operand(zero_reg)); \
dbar(0); \
} while (0)

Definition at line 777 of file liftoff-assembler-loong64-inl.h.

◆ ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER

#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER ( load_linked,
store_conditional )
Value:
do { \
Label compareExchange; \
Label exit; \
dbar(0); \
bind(&compareExchange); \
load_linked(result.gp(), MemOperand(temp0, 0)); \
BranchShort(&exit, ne, expected.gp(), Operand(result.gp())); \
mov(temp2, new_value.gp()); \
store_conditional(temp2, MemOperand(temp0, 0)); \
BranchShort(&compareExchange, eq, temp2, Operand(zero_reg)); \
bind(&exit); \
dbar(0); \
} while (0)

Definition at line 954 of file liftoff-assembler-loong64-inl.h.

◆ ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT

#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT ( load_linked,
store_conditional,
size,
aligned )
Value:
do { \
Label compareExchange; \
Label exit; \
andi(temp1, temp0, aligned); \
Sub_d(temp0, temp0, Operand(temp1)); \
slli_w(temp1, temp1, 3); \
dbar(0); \
bind(&compareExchange); \
load_linked(temp2, MemOperand(temp0, 0)); \
ExtractBits(result.gp(), temp2, temp1, size, false); \
ExtractBits(temp2, expected.gp(), zero_reg, size, false); \
BranchShort(&exit, ne, temp2, Operand(result.gp())); \
InsertBits(temp2, new_value.gp(), temp1, size); \
store_conditional(temp2, MemOperand(temp0, 0)); \
BranchShort(&compareExchange, eq, temp2, Operand(zero_reg)); \
bind(&exit); \
dbar(0); \
} while (0)

Definition at line 970 of file liftoff-assembler-loong64-inl.h.

◆ ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT

#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT ( load_linked,
store_conditional,
size,
aligned )
Value:
do { \
Label exchange; \
andi(temp1, temp0, aligned); \
Sub_d(temp0, temp0, Operand(temp1)); \
slli_w(temp1, temp1, 3); \
dbar(0); \
bind(&exchange); \
load_linked(temp2, MemOperand(temp0, 0)); \
ExtractBits(result.gp(), temp2, temp1, size, false); \
InsertBits(temp2, value.gp(), temp1, size); \
store_conditional(temp2, MemOperand(temp0, 0)); \
BranchShort(&exchange, eq, temp2, Operand(zero_reg)); \
dbar(0); \
} while (0)

Definition at line 896 of file liftoff-assembler-loong64-inl.h.

◆ ATOMIC_BINOP_CASE

#define ATOMIC_BINOP_CASE ( name,
inst32,
inst64,
opcode )

Definition at line 795 of file liftoff-assembler-loong64-inl.h.

◆ FP_BINOP

#define FP_BINOP ( name,
instruction )
Value:
void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister lhs, \
DoubleRegister rhs) { \
instruction(dst, lhs, rhs); \
}
const char * name
Definition builtins.cc:39

Definition at line 1533 of file liftoff-assembler-loong64-inl.h.

◆ FP_UNOP

#define FP_UNOP ( name,
instruction )
Value:
void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \
instruction(dst, src); \
}

Definition at line 1538 of file liftoff-assembler-loong64-inl.h.

◆ FP_UNOP_RETURN_TRUE

#define FP_UNOP_RETURN_TRUE ( name,
instruction )
Value:
bool LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \
instruction(dst, src); \
return true; \
}

Definition at line 1542 of file liftoff-assembler-loong64-inl.h.

◆ I32_BINOP

#define I32_BINOP ( name,
instruction )
Value:
void LiftoffAssembler::emit_i32_##name(Register dst, Register lhs, \
Register rhs) { \
instruction(dst, lhs, rhs); \
}

Definition at line 1283 of file liftoff-assembler-loong64-inl.h.

◆ I32_BINOP_I

#define I32_BINOP_I ( name,
instruction )
Value:
void LiftoffAssembler::emit_i32_##name##i(Register dst, Register lhs, \
int32_t imm) { \
instruction(dst, lhs, Operand(imm)); \
}

Definition at line 1299 of file liftoff-assembler-loong64-inl.h.

◆ I32_SHIFTOP

#define I32_SHIFTOP ( name,
instruction )
Value:
void LiftoffAssembler::emit_i32_##name(Register dst, Register src, \
Register amount) { \
instruction(dst, src, amount); \
}

Definition at line 1328 of file liftoff-assembler-loong64-inl.h.

◆ I32_SHIFTOP_I

#define I32_SHIFTOP_I ( name,
instruction,
instruction1 )
Value:
I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i32_##name##i(Register dst, Register src, \
int amount) { \
instruction1(dst, src, amount & 0x1f); \
}
#define I32_SHIFTOP(name, instruction)

Definition at line 1333 of file liftoff-assembler-loong64-inl.h.

◆ I64_BINOP

#define I64_BINOP ( name,
instruction )
Value:
void LiftoffAssembler::emit_i64_##name( \
LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
instruction(dst.gp(), lhs.gp(), rhs.gp()); \
}

Definition at line 1412 of file liftoff-assembler-loong64-inl.h.

◆ I64_BINOP_I

#define I64_BINOP_I ( name,
instruction )
Value:
void LiftoffAssembler::emit_i64_##name##i( \
LiftoffRegister dst, LiftoffRegister lhs, int32_t imm) { \
instruction(dst.gp(), lhs.gp(), Operand(imm)); \
}

Definition at line 1428 of file liftoff-assembler-loong64-inl.h.

◆ I64_SHIFTOP

#define I64_SHIFTOP ( name,
instruction )
Value:
void LiftoffAssembler::emit_i64_##name( \
LiftoffRegister dst, LiftoffRegister src, Register amount) { \
instruction(dst.gp(), src.gp(), amount); \
}

Definition at line 1442 of file liftoff-assembler-loong64-inl.h.

◆ I64_SHIFTOP_I

#define I64_SHIFTOP_I ( name,
instruction,
instructioni )
Value:
I64_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i64_##name##i(LiftoffRegister dst, \
LiftoffRegister src, int amount) { \
instructioni(dst.gp(), src.gp(), amount & 63); \
}
#define I64_SHIFTOP(name, instruction)

Definition at line 1447 of file liftoff-assembler-loong64-inl.h.

◆ SIMD_BINOP [1/2]

#define SIMD_BINOP ( name1,
name2 )
Value:
void LiftoffAssembler::emit_##name1##_extmul_low_##name2( \
LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) { \
bailout(kSimd, "emit_" #name1 "_extmul_low_" #name2); \
} \
void LiftoffAssembler::emit_##name1##_extmul_high_##name2( \
LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) { \
bailout(kSimd, "emit_" #name1 "_extmul_high_" #name2); \
}

Definition at line 2110 of file liftoff-assembler-loong64-inl.h.

◆ SIMD_BINOP [2/2]

#define SIMD_BINOP ( name1,
name2 )
Value:
void LiftoffAssembler::emit_##name1##_extadd_pairwise_##name2( \
LiftoffRegister dst, LiftoffRegister src) { \
bailout(kSimd, "emit_" #name1 "_extadd_pairwise_" #name2); \
}

Definition at line 2110 of file liftoff-assembler-loong64-inl.h.