liftoff-assembler-mips64-inl.h File Reference

#include "src/codegen/machine-type.h"
#include "src/compiler/linkage.h"
#include "src/heap/mutable-page-metadata.h"
#include "src/wasm/baseline/liftoff-assembler.h"
#include "src/wasm/baseline/parallel-move-inl.h"
#include "src/wasm/object-access.h"
#include "src/wasm/wasm-linkage.h"
#include "src/wasm/wasm-objects.h"

Include dependency graph for liftoff-assembler-mips64-inl.h:

Go to the source code of this file.

Namespaces
namespace	v8
namespace	v8::internal
namespace	v8::internal::wasm
namespace	v8::internal::wasm::liftoff

Macros
#define	ASSEMBLE_ATOMIC_BINOP(load_linked, store_conditional, bin_instr)
#define	ASSEMBLE_ATOMIC_BINOP_EXT(load_linked, store_conditional, size, bin_instr, aligned)
#define	ATOMIC_BINOP_CASE(name, inst32, inst64)
#define	ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(load_linked, store_conditional)
#define	ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(load_linked, store_conditional, size, aligned)
#define	ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(load_linked, store_conditional)
#define	ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT( load_linked, store_conditional, size, aligned)
#define	I32_BINOP(name, instruction)
#define	I32_BINOP_I(name, instruction)
#define	I32_SHIFTOP(name, instruction)
#define	I32_SHIFTOP_I(name, instruction)
#define	I64_BINOP(name, instruction)
#define	I64_BINOP_I(name, instruction)
#define	I64_SHIFTOP(name, instruction)
#define	I64_SHIFTOP_I(name, instruction)
#define	FP_BINOP(name, instruction)
#define	FP_UNOP(name, instruction)
#define	FP_UNOP_RETURN_TRUE(name, instruction)
#define	SIMD_BINOP(name1, name2, type)
#define	SIMD_BINOP(name1, name2, type)

Functions
MemOperand	v8::internal::wasm::liftoff::GetStackSlot (int offset)
MemOperand	v8::internal::wasm::liftoff::GetInstanceDataOperand ()
template<typename T >
MemOperand	v8::internal::wasm::liftoff::GetMemOp (LiftoffAssembler *assm, Register addr, Register offset, T offset_imm, bool i64_offset=false, unsigned shift_amount=0)
void	v8::internal::wasm::liftoff::Load (LiftoffAssembler *assm, LiftoffRegister dst, MemOperand src, ValueKind kind)
void	v8::internal::wasm::liftoff::Store (LiftoffAssembler *assm, MemOperand dst, LiftoffRegister src, ValueKind kind)
void	v8::internal::wasm::liftoff::Store (LiftoffAssembler *assm, Register base, int32_t offset, LiftoffRegister src, ValueKind kind)
void	v8::internal::wasm::liftoff::push (LiftoffAssembler *assm, LiftoffRegister reg, ValueKind kind)
FPUCondition	v8::internal::wasm::liftoff::ConditionToConditionCmpFPU (Condition condition, bool *predicate)
void	v8::internal::wasm::liftoff::EmitAnyTrue (LiftoffAssembler *assm, LiftoffRegister dst, LiftoffRegister src)
void	v8::internal::wasm::liftoff::EmitAllTrue (LiftoffAssembler *assm, LiftoffRegister dst, LiftoffRegister src, MSABranchDF msa_branch_df)
void	v8::internal::wasm::liftoff::StoreToMemory (LiftoffAssembler *assm, MemOperand dst, const LiftoffAssembler::VarState &src)

Macro Definition Documentation

ASSEMBLE_ATOMIC_BINOP

#define ASSEMBLE_ATOMIC_BINOP	(		load_linked,
			store_conditional,
			bin_instr )

Value:

  do {                                                                   \
    Label binop;                                                         \
    sync();                                                              \
    bind(&binop);                                                        \
    load_linked(result.gp(), MemOperand(temp0, 0));                      \
    bin_instr(temp1, result.gp(), Operand(value.gp()));                  \
    store_conditional(temp1, MemOperand(temp0, 0));                      \
    BranchShort(&binop, eq, temp1, Operand(zero_reg));                   \
    sync();                                                              \
  } while (0)

Definition at line 802 of file liftoff-assembler-mips64-inl.h.

ASSEMBLE_ATOMIC_BINOP_EXT

#define ASSEMBLE_ATOMIC_BINOP_EXT	(		load_linked,
			store_conditional,
			size,
			bin_instr,
			aligned )

Value:

  do {                                                                  \
    Label binop;                                                        \
    andi(temp3, temp0, aligned);                                        \
    Dsubu(temp0, temp0, Operand(temp3));                                \
    sll(temp3, temp3, 3);                                               \
    sync();                                                             \
    bind(&binop);                                                       \
    load_linked(temp1, MemOperand(temp0, 0));                           \
    ExtractBits(result.gp(), temp1, temp3, size, false);                \
    bin_instr(temp2, result.gp(), value.gp());                          \
    InsertBits(temp1, temp2, temp3, size);                              \
    store_conditional(temp1, MemOperand(temp0, 0));                     \
    BranchShort(&binop, eq, temp1, Operand(zero_reg));                  \
    sync();                                                             \
  } while (0)

Definition at line 814 of file liftoff-assembler-mips64-inl.h.

ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER

#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER	(		load_linked,
			store_conditional )

Value:

  do {                                                              \
    Label compareExchange;                                          \
    Label exit;                                                     \
    sync();                                                         \
    bind(&compareExchange);                                         \
    load_linked(result.gp(), MemOperand(temp0, 0));                 \
    BranchShort(&exit, ne, expected.gp(), Operand(result.gp()));    \
    mov(temp2, new_value.gp());                                     \
    store_conditional(temp2, MemOperand(temp0, 0));                 \
    BranchShort(&compareExchange, eq, temp2, Operand(zero_reg));    \
    bind(&exit);                                                    \
    sync();                                                         \
  } while (0)

Definition at line 953 of file liftoff-assembler-mips64-inl.h.

ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT

#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT	(		load_linked,
			store_conditional,
			size,
			aligned )

Value:

  do {                                                           \
    Label compareExchange;                                       \
    Label exit;                                                  \
    andi(temp1, temp0, aligned);                                 \
    Dsubu(temp0, temp0, Operand(temp1));                         \
    sll(temp1, temp1, 3);                                        \
    sync();                                                      \
    bind(&compareExchange);                                      \
    load_linked(temp2, MemOperand(temp0, 0));                    \
    ExtractBits(result.gp(), temp2, temp1, size, false);         \
    ExtractBits(temp2, expected.gp(), zero_reg, size, false);    \
    BranchShort(&exit, ne, temp2, Operand(result.gp()));         \
    InsertBits(temp2, new_value.gp(), temp1, size);              \
    store_conditional(temp2, MemOperand(temp0, 0));              \
    BranchShort(&compareExchange, eq, temp2, Operand(zero_reg)); \
    bind(&exit);                                                 \
    sync();                                                      \
  } while (0)

Definition at line 969 of file liftoff-assembler-mips64-inl.h.

ASSEMBLE_ATOMIC_EXCHANGE_INTEGER

#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER	(		load_linked,
			store_conditional )

Value:

  do {                                                                   \
    Label exchange;                                                      \
    sync();                                                              \
    bind(&exchange);                                                     \
    load_linked(result.gp(), MemOperand(temp0, 0));                      \
    mov(temp1, value.gp());                                              \
    store_conditional(temp1, MemOperand(temp0, 0));                      \
    BranchShort(&exchange, eq, temp1, Operand(zero_reg));                \
    sync();                                                              \
  } while (0)

Definition at line 882 of file liftoff-assembler-mips64-inl.h.

ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT

#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT	(		load_linked,
			store_conditional,
			size,
			aligned )

Value:

  do {                                                                       \
    Label exchange;                                                          \
    andi(temp1, temp0, aligned);                                             \
    Dsubu(temp0, temp0, Operand(temp1));                                     \
    sll(temp1, temp1, 3);                                                    \
    sync();                                                                  \
    bind(&exchange);                                                         \
    load_linked(temp2, MemOperand(temp0, 0));                                \
    ExtractBits(result.gp(), temp2, temp1, size, false);                     \
    InsertBits(temp2, value.gp(), temp1, size);                              \
    store_conditional(temp2, MemOperand(temp0, 0));                          \
    BranchShort(&exchange, eq, temp2, Operand(zero_reg));                    \
    sync();                                                                  \
  } while (0)

Definition at line 894 of file liftoff-assembler-mips64-inl.h.

ATOMIC_BINOP_CASE

#define ATOMIC_BINOP_CASE	(		name,
			inst32,
			inst64 )

Definition at line 832 of file liftoff-assembler-mips64-inl.h.

FP_BINOP

#define FP_BINOP	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister lhs, \
                                     DoubleRegister rhs) {                   \
    instruction(dst, lhs, rhs);                                              \
  }

Definition at line 1560 of file liftoff-assembler-mips64-inl.h.

FP_UNOP

#define FP_UNOP	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \
    instruction(dst, src);                                                     \
  }

Definition at line 1565 of file liftoff-assembler-mips64-inl.h.

FP_UNOP_RETURN_TRUE

#define FP_UNOP_RETURN_TRUE	(		name,
			instruction )

Value:

  bool LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \
    instruction(dst, src);                                                     \
    return true;                                                               \
  }

Definition at line 1569 of file liftoff-assembler-mips64-inl.h.

I32_BINOP

#define I32_BINOP	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_i32_##name(Register dst, Register lhs, \
                                         Register rhs) {             \
    instruction(dst, lhs, rhs);                                      \
  }

Definition at line 1269 of file liftoff-assembler-mips64-inl.h.

I32_BINOP_I

#define I32_BINOP_I	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_i32_##name##i(Register dst, Register lhs, \
                                            int32_t imm) {              \
    instruction(dst, lhs, Operand(imm));                                \
  }

Definition at line 1285 of file liftoff-assembler-mips64-inl.h.

I32_SHIFTOP

#define I32_SHIFTOP	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_i32_##name(Register dst, Register src, \
                                         Register amount) {          \
    instruction(dst, src, amount);                                   \
  }

Definition at line 1314 of file liftoff-assembler-mips64-inl.h.

I32_SHIFTOP_I

#define I32_SHIFTOP_I	(		name,
			instruction )

Value:

  I32_SHIFTOP(name, instruction##v)                                     \
  void LiftoffAssembler::emit_i32_##name##i(Register dst, Register src, \
                                            int amount) {               \
    instruction(dst, src, amount & 31);                                 \
  }

Definition at line 1319 of file liftoff-assembler-mips64-inl.h.

I64_BINOP

#define I64_BINOP	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_i64_##name(                              \
      LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
    instruction(dst.gp(), lhs.gp(), rhs.gp());                         \
  }

Definition at line 1397 of file liftoff-assembler-mips64-inl.h.

I64_BINOP_I

#define I64_BINOP_I	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_i64_##name##i(                   \
      LiftoffRegister dst, LiftoffRegister lhs, int32_t imm) { \
    instruction(dst.gp(), lhs.gp(), Operand(imm));             \
  }

Definition at line 1413 of file liftoff-assembler-mips64-inl.h.

I64_SHIFTOP

#define I64_SHIFTOP	(		name,
			instruction )

Value:

  void LiftoffAssembler::emit_i64_##name(                          \
      LiftoffRegister dst, LiftoffRegister src, Register amount) { \
    instruction(dst.gp(), src.gp(), amount);                       \
  }

Definition at line 1427 of file liftoff-assembler-mips64-inl.h.

I64_SHIFTOP_I

#define I64_SHIFTOP_I	(		name,
			instruction )

Value:

  I64_SHIFTOP(name, instruction##v)                                            \
  void LiftoffAssembler::emit_i64_##name##i(LiftoffRegister dst,               \
                                            LiftoffRegister src, int amount) { \
    amount &= 63;                                                              \
    if (amount < 32)                                                           \
      instruction(dst.gp(), src.gp(), amount);                                 \
    else                                                                       \
      instruction##32(dst.gp(), src.gp(), amount - 32);                        \
  }

Definition at line 1432 of file liftoff-assembler-mips64-inl.h.

SIMD_BINOP [1/2]

#define SIMD_BINOP	(		name1,
			name2,
			type )

Value:

  void LiftoffAssembler::emit_##name1##_extmul_low_##name2(              \
      LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) { \
    MacroAssembler::ExtMulLow(type, dst.fp().toW(), src1.fp().toW(),     \
                              src2.fp().toW());                          \
  }                                                                      \
  void LiftoffAssembler::emit_##name1##_extmul_high_##name2(             \
      LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) { \
    MacroAssembler::ExtMulHigh(type, dst.fp().toW(), src1.fp().toW(),    \
                               src2.fp().toW());                         \
  }

Definition at line 2345 of file liftoff-assembler-mips64-inl.h.

SIMD_BINOP [2/2]

#define SIMD_BINOP	(		name1,
			name2,
			type )

Value:

  void LiftoffAssembler::emit_##name1##_extadd_pairwise_##name2(          \
      LiftoffRegister dst, LiftoffRegister src) {                         \
    MacroAssembler::ExtAddPairwise(type, dst.fp().toW(), src.fp().toW()); \
  }

Definition at line 2345 of file liftoff-assembler-mips64-inl.h.