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liftoff-assembler-ppc-inl.h File Reference
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Namespaces

namespace  v8
 
namespace  v8::internal
 
namespace  v8::internal::wasm
 
namespace  v8::internal::wasm::liftoff
 

Macros

#define ATOMIC_OP(instr)
 
#define SIGN_EXT(r)
 
#define ROUND_F64_TO_F32(fpr)
 
#define INT32_AND_WITH_1F(x)
 
#define INT32_AND_WITH_3F(x)
 
#define REGISTER_AND_WITH_1F
 
#define REGISTER_AND_WITH_3F
 
#define LFR_TO_REG(reg)
 
#define UNOP_LIST(V)
 
#define EMIT_UNOP_FUNCTION(name, instr, dtype, stype, dcast, scast, rcast, ret, return_type)
 
#define BINOP_LIST(V)
 
#define EMIT_BINOP_FUNCTION(name, instr, dtype, stype1, stype2, dcast, scast1, scast2, rcast, ret, return_type)
 
#define SIMD_BINOP_LIST(V)
 
#define EMIT_SIMD_BINOP(name, op)
 
#define SIMD_BINOP_WITH_SCRATCH_LIST(V)
 
#define EMIT_SIMD_BINOP_WITH_SCRATCH(name, op)
 
#define SIMD_SHIFT_RR_LIST(V)
 
#define EMIT_SIMD_SHIFT_RR(name, op)
 
#define SIMD_SHIFT_RI_LIST(V)
 
#define EMIT_SIMD_SHIFT_RI(name, op, mask)
 
#define SIMD_UNOP_LIST(V)
 
#define EMIT_SIMD_UNOP(name, op, return_val, return_type)
 
#define SIMD_UNOP_WITH_SCRATCH_LIST(V)
 
#define EMIT_SIMD_UNOP_WITH_SCRATCH(name, op, return_val, return_type)
 
#define SIMD_ALL_TRUE_LIST(V)
 
#define EMIT_SIMD_ALL_TRUE(name, op)
 
#define SIMD_QFM_LIST(V)
 
#define EMIT_SIMD_QFM(name, op)
 
#define SIMD_EXT_ADD_PAIRWISE_LIST(V)
 
#define EMIT_SIMD_EXT_ADD_PAIRWISE(name, op)
 
#define SIMD_RELAXED_BINOP_LIST(V)
 
#define SIMD_VISIT_RELAXED_BINOP(name, op)
 
#define SIMD_RELAXED_UNOP_LIST(V)
 
#define SIMD_VISIT_RELAXED_UNOP(name, op)
 
#define F16_UNOP_LIST(V)
 
#define VISIT_F16_UNOP(name)
 
#define F16_BINOP_LIST(V)
 
#define VISIT_F16_BINOP(name)
 

Functions

MemOperand v8::internal::wasm::liftoff::GetMemOp (LiftoffAssembler *assm, Register addr, Register offset, uintptr_t offset_imm, Register scratch, bool i64_offset=false, unsigned shift_amount=0)
 
MemOperand v8::internal::wasm::liftoff::GetStackSlot (uint32_t offset)
 
MemOperand v8::internal::wasm::liftoff::GetInstanceDataOperand ()
 
void v8::internal::wasm::liftoff::StoreToMemory (LiftoffAssembler *assm, MemOperand dst, const LiftoffAssembler::VarState &src, Register scratch1, Register scratch2)
 

Variables

constexpr bool v8::internal::wasm::is_be = false
 
constexpr int v8::internal::wasm::stack_bias = 0
 

Macro Definition Documentation

◆ ATOMIC_OP

#define ATOMIC_OP ( instr)

Definition at line 720 of file liftoff-assembler-ppc-inl.h.

◆ BINOP_LIST

#define BINOP_LIST ( V)

Definition at line 1350 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_BINOP_FUNCTION

#define EMIT_BINOP_FUNCTION ( name,
instr,
dtype,
stype1,
stype2,
dcast,
scast1,
scast2,
rcast,
ret,
return_type )
Value:
return_type LiftoffAssembler::emit_##name(dtype dst, stype1 lhs, \
stype2 rhs) { \
auto _dst = dcast(dst); \
auto _lhs = scast1(lhs); \
auto _rhs = scast2(rhs); \
instr(_dst, _lhs, _rhs); \
rcast(_dst); \
return ret; \
}
const char * name
Definition builtins.cc:39

Definition at line 1435 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_ALL_TRUE

#define EMIT_SIMD_ALL_TRUE ( name,
op )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, \
LiftoffRegister src) { \
op(dst.gp(), src.fp().toSimd(), r0, ip, kScratchSimd128Reg); \
}

Definition at line 2214 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_BINOP

#define EMIT_SIMD_BINOP ( name,
op )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \
LiftoffRegister rhs) { \
op(dst.fp().toSimd(), lhs.fp().toSimd(), rhs.fp().toSimd()); \
}

Definition at line 2049 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_BINOP_WITH_SCRATCH

#define EMIT_SIMD_BINOP_WITH_SCRATCH ( name,
op )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \
LiftoffRegister rhs) { \
op(dst.fp().toSimd(), lhs.fp().toSimd(), rhs.fp().toSimd(), \
kScratchSimd128Reg); \
}

Definition at line 2091 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_EXT_ADD_PAIRWISE

#define EMIT_SIMD_EXT_ADD_PAIRWISE ( name,
op )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, \
LiftoffRegister src) { \
op(dst.fp().toSimd(), src.fp().toSimd(), kScratchSimd128Reg, \
kScratchSimd128Reg2); \
}

Definition at line 2245 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_QFM

#define EMIT_SIMD_QFM ( name,
op )
Value:
void LiftoffAssembler::emit_##name( \
LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, \
LiftoffRegister src3) { \
op(dst.fp().toSimd(), src1.fp().toSimd(), src2.fp().toSimd(), \
src3.fp().toSimd(), kScratchSimd128Reg); \
}

Definition at line 2229 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_SHIFT_RI

#define EMIT_SIMD_SHIFT_RI ( name,
op,
mask )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \
int32_t rhs) { \
op(dst.fp().toSimd(), lhs.fp().toSimd(), Operand(rhs & mask), r0, \
kScratchSimd128Reg); \
}
uint32_t const mask

Definition at line 2138 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_SHIFT_RR

#define EMIT_SIMD_SHIFT_RR ( name,
op )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \
LiftoffRegister rhs) { \
op(dst.fp().toSimd(), lhs.fp().toSimd(), rhs.gp(), kScratchSimd128Reg); \
}

Definition at line 2115 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_UNOP

#define EMIT_SIMD_UNOP ( name,
op,
return_val,
return_type )
Value:
return_type LiftoffAssembler::emit_##name(LiftoffRegister dst, \
LiftoffRegister src) { \
op(dst.fp().toSimd(), src.fp().toSimd()); \
return return_val; \
}

Definition at line 2177 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_SIMD_UNOP_WITH_SCRATCH

#define EMIT_SIMD_UNOP_WITH_SCRATCH ( name,
op,
return_val,
return_type )
Value:
return_type LiftoffAssembler::emit_##name(LiftoffRegister dst, \
LiftoffRegister src) { \
op(dst.fp().toSimd(), src.fp().toSimd(), kScratchSimd128Reg); \
return return_val; \
}

Definition at line 2199 of file liftoff-assembler-ppc-inl.h.

◆ EMIT_UNOP_FUNCTION

#define EMIT_UNOP_FUNCTION ( name,
instr,
dtype,
stype,
dcast,
scast,
rcast,
ret,
return_type )
Value:
return_type LiftoffAssembler::emit_##name(dtype dst, stype src) { \
auto _dst = dcast(dst); \
auto _src = scast(src); \
instr(_dst, _src); \
rcast(_dst); \
return ret; \
}

Definition at line 1335 of file liftoff-assembler-ppc-inl.h.

◆ F16_BINOP_LIST

#define F16_BINOP_LIST ( V)
Value:
V(f16x8_eq) \
V(f16x8_ne) \
V(f16x8_lt) \
V(f16x8_le) \
V(f16x8_add) \
V(f16x8_sub) \
V(f16x8_mul) \
V(f16x8_div) \
V(f16x8_min) \
V(f16x8_max) \
V(f16x8_pmin) \
V(f16x8_pmax)
#define V(Name)

Definition at line 2313 of file liftoff-assembler-ppc-inl.h.

◆ F16_UNOP_LIST

#define F16_UNOP_LIST ( V)
Value:
V(f16x8_splat) \
V(f16x8_abs) \
V(f16x8_neg) \
V(f16x8_sqrt) \
V(f16x8_ceil) \
V(f16x8_floor) \
V(f16x8_trunc) \
V(f16x8_nearest_int) \
V(i16x8_sconvert_f16x8) \
V(i16x8_uconvert_f16x8) \
V(f16x8_sconvert_i16x8) \
V(f16x8_uconvert_i16x8) \
V(f16x8_demote_f32x4_zero) \
V(f32x4_promote_low_f16x8) \
V(f16x8_demote_f64x2_zero)

Definition at line 2287 of file liftoff-assembler-ppc-inl.h.

◆ INT32_AND_WITH_1F

#define INT32_AND_WITH_1F ( x)
Value:
Operand(x & 0x1f)
int x

Definition at line 1282 of file liftoff-assembler-ppc-inl.h.

◆ INT32_AND_WITH_3F

#define INT32_AND_WITH_3F ( x)
Value:
Operand(x & 0x3f)

Definition at line 1283 of file liftoff-assembler-ppc-inl.h.

◆ LFR_TO_REG

#define LFR_TO_REG ( reg)
Value:
reg.gp()
LiftoffRegister reg

Definition at line 1296 of file liftoff-assembler-ppc-inl.h.

◆ REGISTER_AND_WITH_1F

#define REGISTER_AND_WITH_1F
Value:
([&](Register rhs) { \
andi(r0, rhs, Operand(31)); \
return r0; \
})

Definition at line 1284 of file liftoff-assembler-ppc-inl.h.

◆ REGISTER_AND_WITH_3F

#define REGISTER_AND_WITH_3F
Value:
([&](Register rhs) { \
andi(r0, rhs, Operand(63)); \
return r0; \
})

Definition at line 1290 of file liftoff-assembler-ppc-inl.h.

◆ ROUND_F64_TO_F32

#define ROUND_F64_TO_F32 ( fpr)
Value:
frsp(fpr, fpr)

Definition at line 1281 of file liftoff-assembler-ppc-inl.h.

◆ SIGN_EXT

#define SIGN_EXT ( r)
Value:
extsw(r, r)
int r
Definition mul-fft.cc:298

Definition at line 1280 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_ALL_TRUE_LIST

#define SIMD_ALL_TRUE_LIST ( V)
Value:
V(i64x2_alltrue, I64x2AllTrue) \
V(i32x4_alltrue, I32x4AllTrue) \
V(i16x8_alltrue, I16x8AllTrue) \
V(i8x16_alltrue, I8x16AllTrue)

Definition at line 2209 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_BINOP_LIST

#define SIMD_BINOP_LIST ( V)

Definition at line 1978 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_BINOP_WITH_SCRATCH_LIST

#define SIMD_BINOP_WITH_SCRATCH_LIST ( V)

Definition at line 2058 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_EXT_ADD_PAIRWISE_LIST

#define SIMD_EXT_ADD_PAIRWISE_LIST ( V)
Value:
V(i32x4_extadd_pairwise_i16x8_s, I32x4ExtAddPairwiseI16x8S) \
V(i32x4_extadd_pairwise_i16x8_u, I32x4ExtAddPairwiseI16x8U) \
V(i16x8_extadd_pairwise_i8x16_s, I16x8ExtAddPairwiseI8x16S) \
V(i16x8_extadd_pairwise_i8x16_u, I16x8ExtAddPairwiseI8x16U)

Definition at line 2240 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_QFM_LIST

#define SIMD_QFM_LIST ( V)
Value:
V(f64x2_qfma, F64x2Qfma) \
V(f64x2_qfms, F64x2Qfms) \
V(f32x4_qfma, F32x4Qfma) \
V(f32x4_qfms, F32x4Qfms)

Definition at line 2223 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_RELAXED_BINOP_LIST

#define SIMD_RELAXED_BINOP_LIST ( V)
Value:
V(i8x16_relaxed_swizzle, i8x16_swizzle) \
V(f64x2_relaxed_min, f64x2_pmin) \
V(f64x2_relaxed_max, f64x2_pmax) \
V(f32x4_relaxed_min, f32x4_pmin) \
V(f32x4_relaxed_max, f32x4_pmax) \
V(i16x8_relaxed_q15mulr_s, i16x8_q15mulr_sat_s)

Definition at line 2255 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_RELAXED_UNOP_LIST

#define SIMD_RELAXED_UNOP_LIST ( V)
Value:
V(i32x4_relaxed_trunc_f32x4_s, i32x4_sconvert_f32x4) \
V(i32x4_relaxed_trunc_f32x4_u, i32x4_uconvert_f32x4) \
V(i32x4_relaxed_trunc_f64x2_s_zero, i32x4_trunc_sat_f64x2_s_zero) \
V(i32x4_relaxed_trunc_f64x2_u_zero, i32x4_trunc_sat_f64x2_u_zero)

Definition at line 2272 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_SHIFT_RI_LIST

#define SIMD_SHIFT_RI_LIST ( V)
Value:
V(i64x2_shli, I64x2Shl, 63) \
V(i64x2_shri_s, I64x2ShrS, 63) \
V(i64x2_shri_u, I64x2ShrU, 63) \
V(i32x4_shli, I32x4Shl, 31) \
V(i32x4_shri_s, I32x4ShrS, 31) \
V(i32x4_shri_u, I32x4ShrU, 31) \
V(i16x8_shli, I16x8Shl, 15) \
V(i16x8_shri_s, I16x8ShrS, 15) \
V(i16x8_shri_u, I16x8ShrU, 15) \
V(i8x16_shli, I8x16Shl, 7) \
V(i8x16_shri_s, I8x16ShrS, 7) \
V(i8x16_shri_u, I8x16ShrU, 7)

Definition at line 2124 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_SHIFT_RR_LIST

#define SIMD_SHIFT_RR_LIST ( V)
Value:
V(i64x2_shl, I64x2Shl) \
V(i64x2_shr_s, I64x2ShrS) \
V(i64x2_shr_u, I64x2ShrU) \
V(i32x4_shl, I32x4Shl) \
V(i32x4_shr_s, I32x4ShrS) \
V(i32x4_shr_u, I32x4ShrU) \
V(i16x8_shl, I16x8Shl) \
V(i16x8_shr_s, I16x8ShrS) \
V(i16x8_shr_u, I16x8ShrU) \
V(i8x16_shl, I8x16Shl) \
V(i8x16_shr_s, I8x16ShrS) \
V(i8x16_shr_u, I8x16ShrU)

Definition at line 2101 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_UNOP_LIST

#define SIMD_UNOP_LIST ( V)
Value:
V(f64x2_abs, F64x2Abs, , void) \
V(f64x2_neg, F64x2Neg, , void) \
V(f64x2_sqrt, F64x2Sqrt, , void) \
V(f64x2_ceil, F64x2Ceil, true, bool) \
V(f64x2_floor, F64x2Floor, true, bool) \
V(f64x2_trunc, F64x2Trunc, true, bool) \
V(f64x2_promote_low_f32x4, F64x2PromoteLowF32x4, , void) \
V(f32x4_abs, F32x4Abs, , void) \
V(f32x4_neg, F32x4Neg, , void) \
V(f32x4_sqrt, F32x4Sqrt, , void) \
V(f32x4_ceil, F32x4Ceil, true, bool) \
V(f32x4_floor, F32x4Floor, true, bool) \
V(f32x4_trunc, F32x4Trunc, true, bool) \
V(f32x4_sconvert_i32x4, F32x4SConvertI32x4, , void) \
V(f32x4_uconvert_i32x4, F32x4UConvertI32x4, , void) \
V(i64x2_neg, I64x2Neg, , void) \
V(f64x2_convert_low_i32x4_s, F64x2ConvertLowI32x4S, , void) \
V(i64x2_sconvert_i32x4_low, I64x2SConvertI32x4Low, , void) \
V(i64x2_sconvert_i32x4_high, I64x2SConvertI32x4High, , void) \
V(i32x4_neg, I32x4Neg, , void) \
V(i32x4_sconvert_i16x8_low, I32x4SConvertI16x8Low, , void) \
V(i32x4_sconvert_i16x8_high, I32x4SConvertI16x8High, , void) \
V(i32x4_uconvert_f32x4, I32x4UConvertF32x4, , void) \
V(i16x8_sconvert_i8x16_low, I16x8SConvertI8x16Low, , void) \
V(i16x8_sconvert_i8x16_high, I16x8SConvertI8x16High, , void) \
V(i8x16_popcnt, I8x16Popcnt, , void) \
V(s128_not, S128Not, , void)

Definition at line 2148 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_UNOP_WITH_SCRATCH_LIST

#define SIMD_UNOP_WITH_SCRATCH_LIST ( V)
Value:
V(f32x4_demote_f64x2_zero, F32x4DemoteF64x2Zero, , void) \
V(i64x2_abs, I64x2Abs, , void) \
V(i32x4_abs, I32x4Abs, , void) \
V(i32x4_sconvert_f32x4, I32x4SConvertF32x4, , void) \
V(i32x4_trunc_sat_f64x2_s_zero, I32x4TruncSatF64x2SZero, , void) \
V(i32x4_trunc_sat_f64x2_u_zero, I32x4TruncSatF64x2UZero, , void) \
V(i16x8_abs, I16x8Abs, , void) \
V(i16x8_neg, I16x8Neg, , void) \
V(i8x16_abs, I8x16Abs, , void) \
V(i8x16_neg, I8x16Neg, , void)

Definition at line 2187 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_VISIT_RELAXED_BINOP

#define SIMD_VISIT_RELAXED_BINOP ( name,
op )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \
LiftoffRegister rhs) { \
emit_##op(dst, lhs, rhs); \
}

Definition at line 2263 of file liftoff-assembler-ppc-inl.h.

◆ SIMD_VISIT_RELAXED_UNOP

#define SIMD_VISIT_RELAXED_UNOP ( name,
op )
Value:
void LiftoffAssembler::emit_##name(LiftoffRegister dst, \
LiftoffRegister src) { \
emit_##op(dst, src); \
}

Definition at line 2278 of file liftoff-assembler-ppc-inl.h.

◆ UNOP_LIST

#define UNOP_LIST ( V)

Definition at line 1299 of file liftoff-assembler-ppc-inl.h.

◆ VISIT_F16_BINOP

#define VISIT_F16_BINOP ( name)
Value:
bool LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister lhs, \
LiftoffRegister rhs) { \
return false; \
}

Definition at line 2327 of file liftoff-assembler-ppc-inl.h.

◆ VISIT_F16_UNOP

#define VISIT_F16_UNOP ( name)
Value:
bool LiftoffAssembler::emit_##name(LiftoffRegister dst, \
LiftoffRegister src) { \
return false; \
}

Definition at line 2304 of file liftoff-assembler-ppc-inl.h.