v8
V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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macro-assembler-riscv.cc File Reference
Include dependency graph for macro-assembler-riscv.cc:

Go to the source code of this file.

Namespaces

namespace  v8
 
namespace  v8::internal
 

Macros

#define __   ACCESS_MASM(masm)
 
#define TEST_AND_PUSH_REG(reg)
 
#define T_REGS(V)
 
#define A_REGS(V)
 
#define S_REGS(V)
 
#define TEST_AND_POP_REG(reg)
 
#define T_REGS(V)
 
#define A_REGS(V)
 
#define S_REGS(V)
 
#define BRANCH_ARGS_CHECK(cond, rs, rt)
 

Functions

static bool v8::internal::IsZero (const Operand &rt)
 
static int v8::internal::InstrCountForLiLower32Bit (int64_t value)
 
Register v8::internal::GetRegisterThatIsNotOneOf (Register reg1, Register reg2=no_reg, Register reg3=no_reg, Register reg4=no_reg, Register reg5=no_reg, Register reg6=no_reg)
 
void v8::internal::CallApiFunctionAndReturn (MacroAssembler *masm, bool with_profiling, Register function_address, ExternalReference thunk_ref, Register thunk_arg, int slots_to_drop_on_return, MemOperand *argc_operand, MemOperand return_value_operand)
 

Variables

static RegList v8::internal::t_regs = {t0, t1, t2, t3, t4, t5, t6}
 
static RegList v8::internal::a_regs = {a0, a1, a2, a3, a4, a5, a6, a7}
 
static RegList v8::internal::s_regs = {s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11}
 

Macro Definition Documentation

◆ __

#define __   ACCESS_MASM(masm)

Definition at line 97 of file macro-assembler-riscv.cc.

◆ A_REGS [1/2]

#define A_REGS ( V)
Value:
V(a7) V(a6) V(a5) V(a4) V(a3) V(a2) V(a1) V(a0)
#define V(Name)

◆ A_REGS [2/2]

#define A_REGS ( V)
Value:
V(a0) V(a1) V(a2) V(a3) V(a4) V(a5) V(a6) V(a7)

◆ BRANCH_ARGS_CHECK

#define BRANCH_ARGS_CHECK ( cond,
rs,
rt )
Value:
DCHECK((cond == cc_always && rs == zero_reg && rt.rm() == zero_reg) || \
(cond != cc_always && (rs != zero_reg || rt.rm() != zero_reg)))
#define DCHECK(condition)
Definition logging.h:482

Definition at line 4430 of file macro-assembler-riscv.cc.

◆ S_REGS [1/2]

#define S_REGS ( V)
Value:
V(s11) V(s10) V(s9) V(s8) V(s7) V(s6) V(s5) V(s4) V(s3) V(s2) V(s1)

◆ S_REGS [2/2]

#define S_REGS ( V)
Value:
V(s1) V(s2) V(s3) V(s4) V(s5) V(s6) V(s7) V(s8) V(s9) V(s10) V(s11)

◆ T_REGS [1/2]

#define T_REGS ( V)
Value:
V(t6) V(t5) V(t4) V(t3) V(t2) V(t1) V(t0)

◆ T_REGS [2/2]

#define T_REGS ( V)
Value:
V(t0) V(t1) V(t2) V(t3) V(t4) V(t5) V(t6)

◆ TEST_AND_POP_REG

#define TEST_AND_POP_REG ( reg)
Value:
if (regs.has(reg)) { \
LoadWord(reg, MemOperand(sp, stack_offset)); \
stack_offset += kSystemPointerSize; \
regs.clear(reg); \
}
LiftoffRegister reg

◆ TEST_AND_PUSH_REG

#define TEST_AND_PUSH_REG ( reg)
Value:
if (regs.has(reg)) { \
stack_offset -= kSystemPointerSize; \
StoreWord(reg, MemOperand(sp, stack_offset)); \
regs.clear(reg); \
}