v8
V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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maglev-ir-riscv.cc File Reference
Include dependency graph for maglev-ir-riscv.cc:

Go to the source code of this file.

Namespaces

namespace  v8
 
namespace  v8::internal
 
namespace  v8::internal::maglev
 

Macros

#define __   masm->
 
#define DEF_BITWISE_BINOP(Instruction, opcode)
 
#define DEF_SHIFT_BINOP(Instruction, opcode)
 

Macro Definition Documentation

◆ __

#define __   masm->

Definition at line 22 of file maglev-ir-riscv.cc.

◆ DEF_BITWISE_BINOP

#define DEF_BITWISE_BINOP ( Instruction,
opcode )
Value:
void Instruction::SetValueLocationConstraints() { \
UseRegister(left_input()); \
UseRegister(right_input()); \
DefineAsRegister(this); \
} \
\
void Instruction::GenerateCode(MaglevAssembler* masm, \
const ProcessingState& state) { \
Register lhs = ToRegister(left_input()); \
Register rhs = ToRegister(right_input()); \
Register out = ToRegister(result()); \
__ opcode(out, lhs, Operand(rhs)); \
/* TODO: is zero extension really needed here? */ \
__ ZeroExtendWord(out, out); \
}
ZoneVector< RpoNumber > & result
#define __

Definition at line 513 of file maglev-ir-riscv.cc.

◆ DEF_SHIFT_BINOP

#define DEF_SHIFT_BINOP ( Instruction,
opcode )
Value:
void Instruction::SetValueLocationConstraints() { \
UseRegister(left_input()); \
if (right_input().node()->Is<Int32Constant>()) { \
UseAny(right_input()); \
} else { \
UseRegister(right_input()); \
} \
DefineAsRegister(this); \
} \
\
void Instruction::GenerateCode(MaglevAssembler* masm, \
const ProcessingState& state) { \
Register lhs = ToRegister(left_input()); \
if (Int32Constant* constant = \
right_input().node()->TryCast<Int32Constant>()) { \
uint32_t shift = constant->value() & 31; \
if (shift == 0) { \
__ ZeroExtendWord(out, lhs); \
return; \
} \
__ opcode(out, lhs, Operand(shift)); \
} else { \
Register rhs = ToRegister(right_input()); \
__ opcode(out, lhs, Operand(rhs)); \
} \
}
Node * node
Register ToRegister(BaselineAssembler *basm, BaselineAssembler::ScratchRegisterScope *scope, Arg arg)

Definition at line 534 of file maglev-ir-riscv.cc.