v8::internal::AssemblerRISCVB Class Reference

#include <extension-riscv-b.h>

Inheritance diagram for v8::internal::AssemblerRISCVB:

Collaboration diagram for v8::internal::AssemblerRISCVB:

Public Member Functions
void	sh1add (Register rd, Register rs1, Register rs2)
void	sh2add (Register rd, Register rs1, Register rs2)
void	sh3add (Register rd, Register rs1, Register rs2)
void	andn (Register rd, Register rs1, Register rs2)
void	orn (Register rd, Register rs1, Register rs2)
void	xnor (Register rd, Register rs1, Register rs2)
void	clz (Register rd, Register rs)
void	ctz (Register rd, Register rs)
void	cpop (Register rd, Register rs)
void	max (Register rd, Register rs1, Register rs2)
void	maxu (Register rd, Register rs1, Register rs2)
void	min (Register rd, Register rs1, Register rs2)
void	minu (Register rd, Register rs1, Register rs2)
void	sextb (Register rd, Register rs)
void	sexth (Register rd, Register rs)
void	zexth (Register rd, Register rs)
void	rol (Register rd, Register rs1, Register rs2)
void	ror (Register rd, Register rs1, Register rs2)
void	rori (Register rd, Register rs1, uint8_t shamt)
void	orcb (Register rd, Register rs)
void	rev8 (Register rd, Register rs)
void	bclr (Register rd, Register rs1, Register rs2)
void	bclri (Register rd, Register rs1, uint8_t shamt)
void	bext (Register rd, Register rs1, Register rs2)
void	bexti (Register rd, Register rs1, uint8_t shamt)
void	binv (Register rd, Register rs1, Register rs2)
void	binvi (Register rd, Register rs1, uint8_t shamt)
void	bset (Register rd, Register rs1, Register rs2)
void	bseti (Register rd, Register rs1, uint8_t shamt)

Additional Inherited Members
Protected Types inherited from v8::internal::AssemblerRiscvBase
enum	OffsetSize : int {   kOffset21 = 21 , kOffset12 = 12 , kOffset20 = 20 , kOffset13 = 13 ,   kOffset32 = 32 , kOffset11 = 11 , kOffset9 = 9 }
Protected Member Functions inherited from v8::internal::AssemblerRiscvBase
virtual int32_t	branch_offset_helper (Label *L, OffsetSize bits)=0
virtual void	emit (Instr x)=0
virtual void	emit (ShortInstr x)=0
virtual void	emit (uint64_t x)=0
virtual void	ClearVectorunit ()=0
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, Register rs2)
void	GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, FPURegister rs2)
void	GenInstrR4 (uint8_t funct2, BaseOpcode opcode, Register rd, Register rs1, Register rs2, Register rs3, FPURoundingMode frm)
void	GenInstrR4 (uint8_t funct2, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2, FPURegister rs3, FPURoundingMode frm)
void	GenInstrRAtomic (uint8_t funct5, bool aq, bool rl, uint8_t funct3, Register rd, Register rs1, Register rs2)
void	GenInstrRFrm (uint8_t funct7, BaseOpcode opcode, Register rd, Register rs1, Register rs2, FPURoundingMode frm)
void	GenInstrI (uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, int16_t imm12)
void	GenInstrI (uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, int16_t imm12)
void	GenInstrIShift (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt)
void	GenInstrIShiftW (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt)
void	GenInstrS (uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12)
void	GenInstrS (uint8_t funct3, BaseOpcode opcode, Register rs1, FPURegister rs2, int16_t imm12)
void	GenInstrB (uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12)
void	GenInstrU (BaseOpcode opcode, Register rd, int32_t imm20)
void	GenInstrJ (BaseOpcode opcode, Register rd, int32_t imm20)
void	GenInstrCR (uint8_t funct4, BaseOpcode opcode, Register rd, Register rs2)
void	GenInstrCA (uint8_t funct6, BaseOpcode opcode, Register rd, uint8_t funct, Register rs2)
void	GenInstrCI (uint8_t funct3, BaseOpcode opcode, Register rd, int8_t imm6)
void	GenInstrCIU (uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm6)
void	GenInstrCIU (uint8_t funct3, BaseOpcode opcode, FPURegister rd, uint8_t uimm6)
void	GenInstrCIW (uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm8)
void	GenInstrCSS (uint8_t funct3, BaseOpcode opcode, FPURegister rs2, uint8_t uimm6)
void	GenInstrCSS (uint8_t funct3, BaseOpcode opcode, Register rs2, uint8_t uimm6)
void	GenInstrCL (uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t uimm5)
void	GenInstrCL (uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, uint8_t uimm5)
void	GenInstrCS (uint8_t funct3, BaseOpcode opcode, Register rs2, Register rs1, uint8_t uimm5)
void	GenInstrCS (uint8_t funct3, BaseOpcode opcode, FPURegister rs2, Register rs1, uint8_t uimm5)
void	GenInstrCJ (uint8_t funct3, BaseOpcode opcode, uint16_t uint11)
void	GenInstrCB (uint8_t funct3, BaseOpcode opcode, Register rs1, uint8_t uimm8)
void	GenInstrCBA (uint8_t funct3, uint8_t funct2, BaseOpcode opcode, Register rs1, int8_t imm6)
void	GenInstrBranchCC_rri (uint8_t funct3, Register rs1, Register rs2, int16_t imm12)
void	GenInstrLoad_ri (uint8_t funct3, Register rd, Register rs1, int16_t imm12)
void	GenInstrStore_rri (uint8_t funct3, Register rs1, Register rs2, int16_t imm12)
void	GenInstrALU_ri (uint8_t funct3, Register rd, Register rs1, int16_t imm12)
void	GenInstrShift_ri (bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt)
void	GenInstrALU_rr (uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)
void	GenInstrCSR_ir (uint8_t funct3, Register rd, ControlStatusReg csr, Register rs1)
void	GenInstrCSR_ii (uint8_t funct3, Register rd, ControlStatusReg csr, uint8_t rs1)
void	GenInstrShiftW_ri (bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt)
void	GenInstrALUW_rr (uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)
void	GenInstrPriv (uint8_t funct7, Register rs1, Register rs2)
void	GenInstrLoadFP_ri (uint8_t funct3, FPURegister rd, Register rs1, int16_t imm12)
void	GenInstrStoreFP_rri (uint8_t funct3, Register rs1, FPURegister rs2, int16_t imm12)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, FPURegister rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, Register rs1, Register rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, Register rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, Register rs2)
void	GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, FPURegister rs2)
virtual void	BlockTrampolinePoolFor (int instructions)=0

Detailed Description

Definition at line 15 of file extension-riscv-b.h.

Member Function Documentation

andn()

void v8::internal::AssemblerRISCVB::andn	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 39 of file extension-riscv-b.cc.

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bclr()

void v8::internal::AssemblerRISCVB::bclr	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 141 of file extension-riscv-b.cc.

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bclri()

void v8::internal::AssemblerRISCVB::bclri	(	Register	rd,
		Register	rs1,
		uint8_t	shamt )

Definition at line 145 of file extension-riscv-b.cc.

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bext()

void v8::internal::AssemblerRISCVB::bext	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 152 of file extension-riscv-b.cc.

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bexti()

void v8::internal::AssemblerRISCVB::bexti	(	Register	rd,
		Register	rs1,
		uint8_t	shamt )

Definition at line 155 of file extension-riscv-b.cc.

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binv()

void v8::internal::AssemblerRISCVB::binv	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 162 of file extension-riscv-b.cc.

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binvi()

void v8::internal::AssemblerRISCVB::binvi	(	Register	rd,
		Register	rs1,
		uint8_t	shamt )

Definition at line 165 of file extension-riscv-b.cc.

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bset()

void v8::internal::AssemblerRISCVB::bset	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 172 of file extension-riscv-b.cc.

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bseti()

void v8::internal::AssemblerRISCVB::bseti	(	Register	rd,
		Register	rs1,
		uint8_t	shamt )

Definition at line 175 of file extension-riscv-b.cc.

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clz()

void v8::internal::AssemblerRISCVB::clz	(	Register	rd,
		Register	rs )

Definition at line 49 of file extension-riscv-b.cc.

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cpop()

void v8::internal::AssemblerRISCVB::cpop	(	Register	rd,
		Register	rs )

Definition at line 55 of file extension-riscv-b.cc.

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ctz()

void v8::internal::AssemblerRISCVB::ctz	(	Register	rd,
		Register	rs )

Definition at line 52 of file extension-riscv-b.cc.

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max()

void v8::internal::AssemblerRISCVB::max	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 70 of file extension-riscv-b.cc.

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maxu()

void v8::internal::AssemblerRISCVB::maxu	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 73 of file extension-riscv-b.cc.

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min()

void v8::internal::AssemblerRISCVB::min	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 76 of file extension-riscv-b.cc.

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minu()

void v8::internal::AssemblerRISCVB::minu	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 79 of file extension-riscv-b.cc.

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orcb()

void v8::internal::AssemblerRISCVB::orcb	(	Register	rd,
		Register	rs )

Definition at line 105 of file extension-riscv-b.cc.

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orn()

void v8::internal::AssemblerRISCVB::orn	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 42 of file extension-riscv-b.cc.

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rev8()

void v8::internal::AssemblerRISCVB::rev8	(	Register	rd,
		Register	rs )

Definition at line 132 of file extension-riscv-b.cc.

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rol()

void v8::internal::AssemblerRISCVB::rol	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 97 of file extension-riscv-b.cc.

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ror()

void v8::internal::AssemblerRISCVB::ror	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 101 of file extension-riscv-b.cc.

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rori()

void v8::internal::AssemblerRISCVB::rori	(	Register	rd,
		Register	rs1,
		uint8_t	shamt )

Definition at line 109 of file extension-riscv-b.cc.

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sextb()

void v8::internal::AssemblerRISCVB::sextb	(	Register	rd,
		Register	rs )

Definition at line 83 of file extension-riscv-b.cc.

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sexth()

void v8::internal::AssemblerRISCVB::sexth	(	Register	rd,
		Register	rs )

Definition at line 86 of file extension-riscv-b.cc.

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sh1add()

void v8::internal::AssemblerRISCVB::sh1add	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 11 of file extension-riscv-b.cc.

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sh2add()

void v8::internal::AssemblerRISCVB::sh2add	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 14 of file extension-riscv-b.cc.

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sh3add()

void v8::internal::AssemblerRISCVB::sh3add	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 17 of file extension-riscv-b.cc.

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xnor()

void v8::internal::AssemblerRISCVB::xnor	(	Register	rd,
		Register	rs1,
		Register	rs2 )

Definition at line 45 of file extension-riscv-b.cc.

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zexth()

void v8::internal::AssemblerRISCVB::zexth	(	Register	rd,
		Register	rs )

Definition at line 89 of file extension-riscv-b.cc.

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---

The documentation for this class was generated from the following files:

• src/codegen/riscv/extension-riscv-b.h
• src/codegen/riscv/extension-riscv-b.cc