v8
V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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v8::internal::AssemblerRISCVI Class Reference

#include <base-riscv-i.h>

Inheritance diagram for v8::internal::AssemblerRISCVI:
Collaboration diagram for v8::internal::AssemblerRISCVI:

Public Member Functions

void lui (Register rd, int32_t imm20)
 
void auipc (Register rd, int32_t imm20)
 
void jal (Register rd, int32_t imm20)
 
void jalr (Register rd, Register rs1, int16_t imm12)
 
void beq (Register rs1, Register rs2, int16_t imm12)
 
void bne (Register rs1, Register rs2, int16_t imm12)
 
void blt (Register rs1, Register rs2, int16_t imm12)
 
void bge (Register rs1, Register rs2, int16_t imm12)
 
void bltu (Register rs1, Register rs2, int16_t imm12)
 
void bgeu (Register rs1, Register rs2, int16_t imm12)
 
void lb (Register rd, Register rs1, int16_t imm12)
 
void lh (Register rd, Register rs1, int16_t imm12)
 
void lw (Register rd, Register rs1, int16_t imm12)
 
void lbu (Register rd, Register rs1, int16_t imm12)
 
void lhu (Register rd, Register rs1, int16_t imm12)
 
void sb (Register source, Register base, int16_t imm12)
 
void sh (Register source, Register base, int16_t imm12)
 
void sw (Register source, Register base, int16_t imm12)
 
void addi (Register rd, Register rs1, int16_t imm12)
 
void slti (Register rd, Register rs1, int16_t imm12)
 
void sltiu (Register rd, Register rs1, int16_t imm12)
 
void xori (Register rd, Register rs1, int16_t imm12)
 
void ori (Register rd, Register rs1, int16_t imm12)
 
void andi (Register rd, Register rs1, int16_t imm12)
 
void slli (Register rd, Register rs1, uint8_t shamt)
 
void srli (Register rd, Register rs1, uint8_t shamt)
 
void srai (Register rd, Register rs1, uint8_t shamt)
 
void add (Register rd, Register rs1, Register rs2)
 
void sub (Register rd, Register rs1, Register rs2)
 
void sll (Register rd, Register rs1, Register rs2)
 
void slt (Register rd, Register rs1, Register rs2)
 
void sltu (Register rd, Register rs1, Register rs2)
 
void xor_ (Register rd, Register rs1, Register rs2)
 
void srl (Register rd, Register rs1, Register rs2)
 
void sra (Register rd, Register rs1, Register rs2)
 
void or_ (Register rd, Register rs1, Register rs2)
 
void and_ (Register rd, Register rs1, Register rs2)
 
void nor (Register rd, Register rs, Register rt)
 
void fence (uint8_t pred, uint8_t succ)
 
void fence_tso ()
 
void ecall ()
 
void ebreak ()
 
void sync ()
 
void unimp ()
 
int32_t branch_offset (Label *L)
 
int32_t jump_offset (Label *L)
 
void beq (Register rs1, Register rs2, Label *L)
 
void bne (Register rs1, Register rs2, Label *L)
 
void blt (Register rs1, Register rs2, Label *L)
 
void bge (Register rs1, Register rs2, Label *L)
 
void bltu (Register rs1, Register rs2, Label *L)
 
void bgeu (Register rs1, Register rs2, Label *L)
 
void beqz (Register rs, int16_t imm13)
 
void beqz (Register rs1, Label *L)
 
void bnez (Register rs, int16_t imm13)
 
void bnez (Register rs1, Label *L)
 
void blez (Register rs, int16_t imm13)
 
void blez (Register rs1, Label *L)
 
void bgez (Register rs, int16_t imm13)
 
void bgez (Register rs1, Label *L)
 
void bltz (Register rs, int16_t imm13)
 
void bltz (Register rs1, Label *L)
 
void bgtz (Register rs, int16_t imm13)
 
void bgtz (Register rs1, Label *L)
 
void bgt (Register rs1, Register rs2, int16_t imm13)
 
void bgt (Register rs1, Register rs2, Label *L)
 
void ble (Register rs1, Register rs2, int16_t imm13)
 
void ble (Register rs1, Register rs2, Label *L)
 
void bgtu (Register rs1, Register rs2, int16_t imm13)
 
void bgtu (Register rs1, Register rs2, Label *L)
 
void bleu (Register rs1, Register rs2, int16_t imm13)
 
void bleu (Register rs1, Register rs2, Label *L)
 
void j (int32_t imm21)
 
void j (Label *L)
 
void b (Label *L)
 
void jal (int32_t imm21)
 
void jal (Label *L)
 
void jr (Register rs)
 
void jr (Register rs, int32_t imm12)
 
void jalr (Register rs, int32_t imm12)
 
void jalr (Register rs)
 
void ret ()
 
void call (int32_t offset)
 
void mv (Register rd, Register rs)
 
void not_ (Register rd, Register rs)
 
void neg (Register rd, Register rs)
 
void seqz (Register rd, Register rs)
 
void snez (Register rd, Register rs)
 
void sltz (Register rd, Register rs)
 
void sgtz (Register rd, Register rs)
 

Static Public Member Functions

static int JumpOffset (Instr instr)
 
static int AuipcOffset (Instr instr)
 
static int JalrOffset (Instr instr)
 
static int LoadOffset (Instr instr)
 
static bool IsBranch (Instr instr)
 
static bool IsNop (Instr instr)
 
static bool IsJump (Instr instr)
 
static bool IsJal (Instr instr)
 
static bool IsJalr (Instr instr)
 
static bool IsLui (Instr instr)
 
static bool IsAuipc (Instr instr)
 
static bool IsAddi (Instr instr)
 
static bool IsOri (Instr instr)
 
static bool IsSlli (Instr instr)
 
static bool IsLw (Instr instr)
 

Additional Inherited Members

- Protected Types inherited from v8::internal::AssemblerRiscvBase
enum  OffsetSize : int {
  kOffset21 = 21 , kOffset12 = 12 , kOffset20 = 20 , kOffset13 = 13 ,
  kOffset32 = 32 , kOffset11 = 11 , kOffset9 = 9
}
 
- Protected Member Functions inherited from v8::internal::AssemblerRiscvBase
virtual int32_t branch_offset_helper (Label *L, OffsetSize bits)=0
 
virtual void emit (Instr x)=0
 
virtual void emit (ShortInstr x)=0
 
virtual void emit (uint64_t x)=0
 
virtual void ClearVectorunit ()=0
 
void GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, Register rs2)
 
void GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2)
 
void GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, Register rs2)
 
void GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, Register rs2)
 
void GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, FPURegister rd, FPURegister rs1, Register rs2)
 
void GenInstrR (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, FPURegister rs1, FPURegister rs2)
 
void GenInstrR4 (uint8_t funct2, BaseOpcode opcode, Register rd, Register rs1, Register rs2, Register rs3, FPURoundingMode frm)
 
void GenInstrR4 (uint8_t funct2, BaseOpcode opcode, FPURegister rd, FPURegister rs1, FPURegister rs2, FPURegister rs3, FPURoundingMode frm)
 
void GenInstrRAtomic (uint8_t funct5, bool aq, bool rl, uint8_t funct3, Register rd, Register rs1, Register rs2)
 
void GenInstrRFrm (uint8_t funct7, BaseOpcode opcode, Register rd, Register rs1, Register rs2, FPURoundingMode frm)
 
void GenInstrI (uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, int16_t imm12)
 
void GenInstrI (uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, int16_t imm12)
 
void GenInstrIShift (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt)
 
void GenInstrIShiftW (uint8_t funct7, uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t shamt)
 
void GenInstrS (uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12)
 
void GenInstrS (uint8_t funct3, BaseOpcode opcode, Register rs1, FPURegister rs2, int16_t imm12)
 
void GenInstrB (uint8_t funct3, BaseOpcode opcode, Register rs1, Register rs2, int16_t imm12)
 
void GenInstrU (BaseOpcode opcode, Register rd, int32_t imm20)
 
void GenInstrJ (BaseOpcode opcode, Register rd, int32_t imm20)
 
void GenInstrCR (uint8_t funct4, BaseOpcode opcode, Register rd, Register rs2)
 
void GenInstrCA (uint8_t funct6, BaseOpcode opcode, Register rd, uint8_t funct, Register rs2)
 
void GenInstrCI (uint8_t funct3, BaseOpcode opcode, Register rd, int8_t imm6)
 
void GenInstrCIU (uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm6)
 
void GenInstrCIU (uint8_t funct3, BaseOpcode opcode, FPURegister rd, uint8_t uimm6)
 
void GenInstrCIW (uint8_t funct3, BaseOpcode opcode, Register rd, uint8_t uimm8)
 
void GenInstrCSS (uint8_t funct3, BaseOpcode opcode, FPURegister rs2, uint8_t uimm6)
 
void GenInstrCSS (uint8_t funct3, BaseOpcode opcode, Register rs2, uint8_t uimm6)
 
void GenInstrCL (uint8_t funct3, BaseOpcode opcode, Register rd, Register rs1, uint8_t uimm5)
 
void GenInstrCL (uint8_t funct3, BaseOpcode opcode, FPURegister rd, Register rs1, uint8_t uimm5)
 
void GenInstrCS (uint8_t funct3, BaseOpcode opcode, Register rs2, Register rs1, uint8_t uimm5)
 
void GenInstrCS (uint8_t funct3, BaseOpcode opcode, FPURegister rs2, Register rs1, uint8_t uimm5)
 
void GenInstrCJ (uint8_t funct3, BaseOpcode opcode, uint16_t uint11)
 
void GenInstrCB (uint8_t funct3, BaseOpcode opcode, Register rs1, uint8_t uimm8)
 
void GenInstrCBA (uint8_t funct3, uint8_t funct2, BaseOpcode opcode, Register rs1, int8_t imm6)
 
void GenInstrBranchCC_rri (uint8_t funct3, Register rs1, Register rs2, int16_t imm12)
 
void GenInstrLoad_ri (uint8_t funct3, Register rd, Register rs1, int16_t imm12)
 
void GenInstrStore_rri (uint8_t funct3, Register rs1, Register rs2, int16_t imm12)
 
void GenInstrALU_ri (uint8_t funct3, Register rd, Register rs1, int16_t imm12)
 
void GenInstrShift_ri (bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt)
 
void GenInstrALU_rr (uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)
 
void GenInstrCSR_ir (uint8_t funct3, Register rd, ControlStatusReg csr, Register rs1)
 
void GenInstrCSR_ii (uint8_t funct3, Register rd, ControlStatusReg csr, uint8_t rs1)
 
void GenInstrShiftW_ri (bool arithshift, uint8_t funct3, Register rd, Register rs1, uint8_t shamt)
 
void GenInstrALUW_rr (uint8_t funct7, uint8_t funct3, Register rd, Register rs1, Register rs2)
 
void GenInstrPriv (uint8_t funct7, Register rs1, Register rs2)
 
void GenInstrLoadFP_ri (uint8_t funct3, FPURegister rd, Register rs1, int16_t imm12)
 
void GenInstrStoreFP_rri (uint8_t funct3, Register rs1, FPURegister rs2, int16_t imm12)
 
void GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, FPURegister rs2)
 
void GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, Register rs1, Register rs2)
 
void GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, FPURegister rd, FPURegister rs1, Register rs2)
 
void GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, Register rs2)
 
void GenInstrALUFP_rr (uint8_t funct7, uint8_t funct3, Register rd, FPURegister rs1, FPURegister rs2)
 
virtual void BlockTrampolinePoolFor (int instructions)=0
 

Detailed Description

Definition at line 15 of file base-riscv-i.h.

Member Function Documentation

◆ add()

void v8::internal::AssemblerRISCVI::add ( Register rd,
Register rs1,
Register rs2 )

Definition at line 139 of file base-riscv-i.cc.

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◆ addi()

void v8::internal::AssemblerRISCVI::addi ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 101 of file base-riscv-i.cc.

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◆ and_()

void v8::internal::AssemblerRISCVI::and_ ( Register rd,
Register rs1,
Register rs2 )

Definition at line 175 of file base-riscv-i.cc.

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◆ andi()

void v8::internal::AssemblerRISCVI::andi ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 121 of file base-riscv-i.cc.

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◆ auipc()

void v8::internal::AssemblerRISCVI::auipc ( Register rd,
int32_t imm20 )

Definition at line 13 of file base-riscv-i.cc.

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◆ AuipcOffset()

int v8::internal::AssemblerRISCVI::AuipcOffset ( Instr instr)
static

Definition at line 257 of file base-riscv-i.cc.

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◆ b()

void v8::internal::AssemblerRISCVI::b ( Label * L)
inline

Definition at line 168 of file base-riscv-i.h.

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◆ beq() [1/2]

void v8::internal::AssemblerRISCVI::beq ( Register rs1,
Register rs2,
int16_t imm12 )

Definition at line 33 of file base-riscv-i.cc.

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◆ beq() [2/2]

void v8::internal::AssemblerRISCVI::beq ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 113 of file base-riscv-i.h.

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◆ beqz() [1/2]

void v8::internal::AssemblerRISCVI::beqz ( Register rs,
int16_t imm13 )
inline

Definition at line 132 of file base-riscv-i.h.

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◆ beqz() [2/2]

void v8::internal::AssemblerRISCVI::beqz ( Register rs1,
Label * L )
inline

Definition at line 133 of file base-riscv-i.h.

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◆ bge() [1/2]

void v8::internal::AssemblerRISCVI::bge ( Register rs1,
Register rs2,
int16_t imm12 )

Definition at line 48 of file base-riscv-i.cc.

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◆ bge() [2/2]

void v8::internal::AssemblerRISCVI::bge ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 122 of file base-riscv-i.h.

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◆ bgeu() [1/2]

void v8::internal::AssemblerRISCVI::bgeu ( Register rs1,
Register rs2,
int16_t imm12 )

Definition at line 58 of file base-riscv-i.cc.

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◆ bgeu() [2/2]

void v8::internal::AssemblerRISCVI::bgeu ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 128 of file base-riscv-i.h.

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◆ bgez() [1/2]

void v8::internal::AssemblerRISCVI::bgez ( Register rs,
int16_t imm13 )
inline

Definition at line 138 of file base-riscv-i.h.

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◆ bgez() [2/2]

void v8::internal::AssemblerRISCVI::bgez ( Register rs1,
Label * L )
inline

Definition at line 139 of file base-riscv-i.h.

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◆ bgt() [1/2]

void v8::internal::AssemblerRISCVI::bgt ( Register rs1,
Register rs2,
int16_t imm13 )
inline

Definition at line 145 of file base-riscv-i.h.

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◆ bgt() [2/2]

void v8::internal::AssemblerRISCVI::bgt ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 146 of file base-riscv-i.h.

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◆ bgtu() [1/2]

void v8::internal::AssemblerRISCVI::bgtu ( Register rs1,
Register rs2,
int16_t imm13 )
inline

Definition at line 153 of file base-riscv-i.h.

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◆ bgtu() [2/2]

void v8::internal::AssemblerRISCVI::bgtu ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 156 of file base-riscv-i.h.

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◆ bgtz() [1/2]

void v8::internal::AssemblerRISCVI::bgtz ( Register rs,
int16_t imm13 )
inline

Definition at line 142 of file base-riscv-i.h.

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◆ bgtz() [2/2]

void v8::internal::AssemblerRISCVI::bgtz ( Register rs1,
Label * L )
inline

Definition at line 144 of file base-riscv-i.h.

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◆ ble() [1/2]

void v8::internal::AssemblerRISCVI::ble ( Register rs1,
Register rs2,
int16_t imm13 )
inline

Definition at line 149 of file base-riscv-i.h.

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◆ ble() [2/2]

void v8::internal::AssemblerRISCVI::ble ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 150 of file base-riscv-i.h.

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◆ bleu() [1/2]

void v8::internal::AssemblerRISCVI::bleu ( Register rs1,
Register rs2,
int16_t imm13 )
inline

Definition at line 159 of file base-riscv-i.h.

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◆ bleu() [2/2]

void v8::internal::AssemblerRISCVI::bleu ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 162 of file base-riscv-i.h.

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◆ blez() [1/2]

void v8::internal::AssemblerRISCVI::blez ( Register rs,
int16_t imm13 )
inline

Definition at line 136 of file base-riscv-i.h.

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◆ blez() [2/2]

void v8::internal::AssemblerRISCVI::blez ( Register rs1,
Label * L )
inline

Definition at line 137 of file base-riscv-i.h.

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◆ blt() [1/2]

void v8::internal::AssemblerRISCVI::blt ( Register rs1,
Register rs2,
int16_t imm12 )

Definition at line 43 of file base-riscv-i.cc.

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◆ blt() [2/2]

void v8::internal::AssemblerRISCVI::blt ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 119 of file base-riscv-i.h.

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◆ bltu() [1/2]

void v8::internal::AssemblerRISCVI::bltu ( Register rs1,
Register rs2,
int16_t imm12 )

Definition at line 53 of file base-riscv-i.cc.

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◆ bltu() [2/2]

void v8::internal::AssemblerRISCVI::bltu ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 125 of file base-riscv-i.h.

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◆ bltz() [1/2]

void v8::internal::AssemblerRISCVI::bltz ( Register rs,
int16_t imm13 )
inline

Definition at line 140 of file base-riscv-i.h.

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◆ bltz() [2/2]

void v8::internal::AssemblerRISCVI::bltz ( Register rs1,
Label * L )
inline

Definition at line 141 of file base-riscv-i.h.

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◆ bne() [1/2]

void v8::internal::AssemblerRISCVI::bne ( Register rs1,
Register rs2,
int16_t imm12 )

Definition at line 38 of file base-riscv-i.cc.

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◆ bne() [2/2]

void v8::internal::AssemblerRISCVI::bne ( Register rs1,
Register rs2,
Label * L )
inline

Definition at line 116 of file base-riscv-i.h.

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◆ bnez() [1/2]

void v8::internal::AssemblerRISCVI::bnez ( Register rs,
int16_t imm13 )
inline

Definition at line 134 of file base-riscv-i.h.

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◆ bnez() [2/2]

void v8::internal::AssemblerRISCVI::bnez ( Register rs1,
Label * L )
inline

Definition at line 135 of file base-riscv-i.h.

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◆ branch_offset()

int32_t v8::internal::AssemblerRISCVI::branch_offset ( Label * L)
inline

Definition at line 105 of file base-riscv-i.h.

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◆ call()

void v8::internal::AssemblerRISCVI::call ( int32_t offset)
inline

Definition at line 176 of file base-riscv-i.h.

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◆ ebreak()

void v8::internal::AssemblerRISCVI::ebreak ( )

Definition at line 198 of file base-riscv-i.cc.

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◆ ecall()

void v8::internal::AssemblerRISCVI::ecall ( )

Definition at line 194 of file base-riscv-i.cc.

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◆ fence()

void v8::internal::AssemblerRISCVI::fence ( uint8_t pred,
uint8_t succ )

Definition at line 181 of file base-riscv-i.cc.

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◆ fence_tso()

void v8::internal::AssemblerRISCVI::fence_tso ( )

Definition at line 187 of file base-riscv-i.cc.

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◆ IsAddi()

bool v8::internal::AssemblerRISCVI::IsAddi ( Instr instr)
static

Definition at line 234 of file base-riscv-i.cc.

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◆ IsAuipc()

bool v8::internal::AssemblerRISCVI::IsAuipc ( Instr instr)
static

Definition at line 231 of file base-riscv-i.cc.

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◆ IsBranch()

bool v8::internal::AssemblerRISCVI::IsBranch ( Instr instr)
static

Definition at line 209 of file base-riscv-i.cc.

◆ IsJal()

bool v8::internal::AssemblerRISCVI::IsJal ( Instr instr)
static

Definition at line 220 of file base-riscv-i.cc.

◆ IsJalr()

bool v8::internal::AssemblerRISCVI::IsJalr ( Instr instr)
static

Definition at line 224 of file base-riscv-i.cc.

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◆ IsJump()

bool v8::internal::AssemblerRISCVI::IsJump ( Instr instr)
static

Definition at line 213 of file base-riscv-i.cc.

◆ IsLui()

bool v8::internal::AssemblerRISCVI::IsLui ( Instr instr)
static

Definition at line 228 of file base-riscv-i.cc.

◆ IsLw()

bool v8::internal::AssemblerRISCVI::IsLw ( Instr instr)
static

Definition at line 263 of file base-riscv-i.cc.

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◆ IsNop()

bool v8::internal::AssemblerRISCVI::IsNop ( Instr instr)
static

Definition at line 218 of file base-riscv-i.cc.

◆ IsOri()

bool v8::internal::AssemblerRISCVI::IsOri ( Instr instr)
static

Definition at line 237 of file base-riscv-i.cc.

◆ IsSlli()

bool v8::internal::AssemblerRISCVI::IsSlli ( Instr instr)
static

Definition at line 240 of file base-riscv-i.cc.

◆ j() [1/2]

void v8::internal::AssemblerRISCVI::j ( int32_t imm21)
inline

Definition at line 166 of file base-riscv-i.h.

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◆ j() [2/2]

void v8::internal::AssemblerRISCVI::j ( Label * L)
inline

Definition at line 167 of file base-riscv-i.h.

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◆ jal() [1/3]

void v8::internal::AssemblerRISCVI::jal ( int32_t imm21)
inline

Definition at line 169 of file base-riscv-i.h.

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◆ jal() [2/3]

void v8::internal::AssemblerRISCVI::jal ( Label * L)
inline

Definition at line 170 of file base-riscv-i.h.

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◆ jal() [3/3]

void v8::internal::AssemblerRISCVI::jal ( Register rd,
int32_t imm20 )

Definition at line 19 of file base-riscv-i.cc.

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◆ jalr() [1/3]

void v8::internal::AssemblerRISCVI::jalr ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 25 of file base-riscv-i.cc.

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◆ jalr() [2/3]

void v8::internal::AssemblerRISCVI::jalr ( Register rs)
inline

Definition at line 174 of file base-riscv-i.h.

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◆ jalr() [3/3]

void v8::internal::AssemblerRISCVI::jalr ( Register rs,
int32_t imm12 )
inline

Definition at line 173 of file base-riscv-i.h.

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◆ JalrOffset()

int v8::internal::AssemblerRISCVI::JalrOffset ( Instr instr)
static

Definition at line 251 of file base-riscv-i.cc.

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◆ jr() [1/2]

void v8::internal::AssemblerRISCVI::jr ( Register rs)
inline

Definition at line 171 of file base-riscv-i.h.

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◆ jr() [2/2]

void v8::internal::AssemblerRISCVI::jr ( Register rs,
int32_t imm12 )
inline

Definition at line 172 of file base-riscv-i.h.

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◆ jump_offset()

int32_t v8::internal::AssemblerRISCVI::jump_offset ( Label * L)
inline

Definition at line 108 of file base-riscv-i.h.

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◆ JumpOffset()

int v8::internal::AssemblerRISCVI::JumpOffset ( Instr instr)
static

Definition at line 244 of file base-riscv-i.cc.

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◆ lb()

void v8::internal::AssemblerRISCVI::lb ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 65 of file base-riscv-i.cc.

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◆ lbu()

void v8::internal::AssemblerRISCVI::lbu ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 77 of file base-riscv-i.cc.

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◆ lh()

void v8::internal::AssemblerRISCVI::lh ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 69 of file base-riscv-i.cc.

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◆ lhu()

void v8::internal::AssemblerRISCVI::lhu ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 81 of file base-riscv-i.cc.

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◆ LoadOffset()

int v8::internal::AssemblerRISCVI::LoadOffset ( Instr instr)
static

Definition at line 267 of file base-riscv-i.cc.

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◆ lui()

void v8::internal::AssemblerRISCVI::lui ( Register rd,
int32_t imm20 )

Definition at line 9 of file base-riscv-i.cc.

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◆ lw()

void v8::internal::AssemblerRISCVI::lw ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 73 of file base-riscv-i.cc.

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◆ mv()

void v8::internal::AssemblerRISCVI::mv ( Register rd,
Register rs )
inline

Definition at line 181 of file base-riscv-i.h.

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◆ neg()

void v8::internal::AssemblerRISCVI::neg ( Register rd,
Register rs )
inline

Definition at line 183 of file base-riscv-i.h.

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◆ nor()

void v8::internal::AssemblerRISCVI::nor ( Register rd,
Register rs,
Register rt )
inline

Definition at line 67 of file base-riscv-i.h.

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◆ not_()

void v8::internal::AssemblerRISCVI::not_ ( Register rd,
Register rs )
inline

Definition at line 182 of file base-riscv-i.h.

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◆ or_()

void v8::internal::AssemblerRISCVI::or_ ( Register rd,
Register rs1,
Register rs2 )

Definition at line 171 of file base-riscv-i.cc.

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◆ ori()

void v8::internal::AssemblerRISCVI::ori ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 117 of file base-riscv-i.cc.

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◆ ret()

void v8::internal::AssemblerRISCVI::ret ( )
inline

Definition at line 175 of file base-riscv-i.h.

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◆ sb()

void v8::internal::AssemblerRISCVI::sb ( Register source,
Register base,
int16_t imm12 )

Definition at line 87 of file base-riscv-i.cc.

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◆ seqz()

void v8::internal::AssemblerRISCVI::seqz ( Register rd,
Register rs )
inline

Definition at line 184 of file base-riscv-i.h.

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◆ sgtz()

void v8::internal::AssemblerRISCVI::sgtz ( Register rd,
Register rs )
inline

Definition at line 187 of file base-riscv-i.h.

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◆ sh()

void v8::internal::AssemblerRISCVI::sh ( Register source,
Register base,
int16_t imm12 )

Definition at line 91 of file base-riscv-i.cc.

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◆ sll()

void v8::internal::AssemblerRISCVI::sll ( Register rd,
Register rs1,
Register rs2 )

Definition at line 147 of file base-riscv-i.cc.

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◆ slli()

void v8::internal::AssemblerRISCVI::slli ( Register rd,
Register rs1,
uint8_t shamt )

Definition at line 125 of file base-riscv-i.cc.

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◆ slt()

void v8::internal::AssemblerRISCVI::slt ( Register rd,
Register rs1,
Register rs2 )

Definition at line 151 of file base-riscv-i.cc.

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◆ slti()

void v8::internal::AssemblerRISCVI::slti ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 105 of file base-riscv-i.cc.

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◆ sltiu()

void v8::internal::AssemblerRISCVI::sltiu ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 109 of file base-riscv-i.cc.

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◆ sltu()

void v8::internal::AssemblerRISCVI::sltu ( Register rd,
Register rs1,
Register rs2 )

Definition at line 155 of file base-riscv-i.cc.

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◆ sltz()

void v8::internal::AssemblerRISCVI::sltz ( Register rd,
Register rs )
inline

Definition at line 186 of file base-riscv-i.h.

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◆ snez()

void v8::internal::AssemblerRISCVI::snez ( Register rd,
Register rs )
inline

Definition at line 185 of file base-riscv-i.h.

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◆ sra()

void v8::internal::AssemblerRISCVI::sra ( Register rd,
Register rs1,
Register rs2 )

Definition at line 167 of file base-riscv-i.cc.

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◆ srai()

void v8::internal::AssemblerRISCVI::srai ( Register rd,
Register rs1,
uint8_t shamt )

Definition at line 133 of file base-riscv-i.cc.

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◆ srl()

void v8::internal::AssemblerRISCVI::srl ( Register rd,
Register rs1,
Register rs2 )

Definition at line 163 of file base-riscv-i.cc.

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◆ srli()

void v8::internal::AssemblerRISCVI::srli ( Register rd,
Register rs1,
uint8_t shamt )

Definition at line 129 of file base-riscv-i.cc.

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◆ sub()

void v8::internal::AssemblerRISCVI::sub ( Register rd,
Register rs1,
Register rs2 )

Definition at line 143 of file base-riscv-i.cc.

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◆ sw()

void v8::internal::AssemblerRISCVI::sw ( Register source,
Register base,
int16_t imm12 )

Definition at line 95 of file base-riscv-i.cc.

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◆ sync()

void v8::internal::AssemblerRISCVI::sync ( )
inline

Definition at line 80 of file base-riscv-i.h.

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◆ unimp()

void v8::internal::AssemblerRISCVI::unimp ( )

Definition at line 205 of file base-riscv-i.cc.

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◆ xor_()

void v8::internal::AssemblerRISCVI::xor_ ( Register rd,
Register rs1,
Register rs2 )

Definition at line 159 of file base-riscv-i.cc.

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◆ xori()

void v8::internal::AssemblerRISCVI::xori ( Register rd,
Register rs1,
int16_t imm12 )

Definition at line 113 of file base-riscv-i.cc.

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The documentation for this class was generated from the following files: