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V8 is Google’s open source high-performance JavaScript and WebAssembly engine, written in C++.
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code-generator-mips64.cc File Reference
#include "src/codegen/assembler-inl.h"
#include "src/codegen/callable.h"
#include "src/codegen/machine-type.h"
#include "src/codegen/macro-assembler.h"
#include "src/codegen/mips64/constants-mips64.h"
#include "src/codegen/optimized-compilation-info.h"
#include "src/compiler/backend/code-generator-impl.h"
#include "src/compiler/backend/code-generator.h"
#include "src/compiler/backend/gap-resolver.h"
#include "src/compiler/node-matchers.h"
#include "src/compiler/osr.h"
#include "src/heap/mutable-page-metadata.h"
Include dependency graph for code-generator-mips64.cc:

Go to the source code of this file.

Classes

class  v8::internal::compiler::MipsOperandConverter
 

Namespaces

namespace  v8
 
namespace  v8::internal
 
namespace  v8::internal::compiler
 

Macros

#define __   masm()->
 
#define TRACE(...)
 
#define CREATE_OOL_CLASS(ool_name, tasm_ool_name, T)
 
#define ASSEMBLE_ATOMIC_LOAD_INTEGER(asm_instr)
 
#define ASSEMBLE_ATOMIC_STORE_INTEGER(asm_instr)
 
#define ASSEMBLE_ATOMIC_BINOP(load_linked, store_conditional, bin_instr)
 
#define ASSEMBLE_ATOMIC_BINOP_EXT(load_linked, store_conditional, sign_extend, size, bin_instr, representation)
 
#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(load_linked, store_conditional)
 
#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT( load_linked, store_conditional, sign_extend, size, representation)
 
#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(load_linked, store_conditional)
 
#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT( load_linked, store_conditional, sign_extend, size, representation)
 
#define ASSEMBLE_IEEE754_BINOP(name)
 
#define ASSEMBLE_IEEE754_UNOP(name)
 
#define ASSEMBLE_F64X2_ARITHMETIC_BINOP(op)
 
#define ATOMIC_BINOP_CASE(op, inst32, inst64)
 
#define UNSUPPORTED_COND(opcode, condition)
 
#define __   masm->
 
#define __   masm()->
 

Functions

static bool v8::internal::compiler::HasRegisterInput (Instruction *instr, size_t index)
 
void v8::internal::compiler::AssembleBranchToLabels (CodeGenerator *gen, MacroAssembler *masm, Instruction *instr, FlagsCondition condition, Label *tlabel, Label *flabel, bool fallthru)
 

Macro Definition Documentation

◆ __ [1/3]

#define __   masm()->

Definition at line 22 of file code-generator-mips64.cc.

◆ __ [2/3]

#define __   masm->

Definition at line 22 of file code-generator-mips64.cc.

◆ __ [3/3]

#define __   masm()->

Definition at line 22 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_BINOP

#define ASSEMBLE_ATOMIC_BINOP ( load_linked,
store_conditional,
bin_instr )
Value:
do { \
Label binop; \
__ Daddu(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
__ sync(); \
__ bind(&binop); \
__ load_linked(i.OutputRegister(0), MemOperand(i.TempRegister(0), 0)); \
__ bin_instr(i.TempRegister(1), i.OutputRegister(0), \
Operand(i.InputRegister(2))); \
__ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
__ BranchShort(&binop, eq, i.TempRegister(1), Operand(zero_reg)); \
__ sync(); \
} while (0)
__
#define __
Definition code-generator-mips64.cc:22

Definition at line 343 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_BINOP_EXT

#define ASSEMBLE_ATOMIC_BINOP_EXT ( load_linked,
store_conditional,
sign_extend,
size,
bin_instr,
representation )
Value:
do { \
Label binop; \
__ daddu(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
if (representation == 32) { \
__ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
} else { \
DCHECK_EQ(representation, 64); \
__ andi(i.TempRegister(3), i.TempRegister(0), 0x7); \
} \
__ Dsubu(i.TempRegister(0), i.TempRegister(0), \
Operand(i.TempRegister(3))); \
__ sll(i.TempRegister(3), i.TempRegister(3), 3); \
__ sync(); \
__ bind(&binop); \
__ load_linked(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
__ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
size, sign_extend); \
__ bin_instr(i.TempRegister(2), i.OutputRegister(0), \
Operand(i.InputRegister(2))); \
__ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
size); \
__ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
__ BranchShort(&binop, eq, i.TempRegister(1), Operand(zero_reg)); \
__ sync(); \
} while (0)

Definition at line 357 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER

#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER ( load_linked,
store_conditional )
Value:
do { \
Label compareExchange; \
Label exit; \
__ daddu(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
__ sync(); \
__ bind(&compareExchange); \
__ load_linked(i.OutputRegister(0), MemOperand(i.TempRegister(0), 0)); \
__ BranchShort(&exit, ne, i.InputRegister(2), \
Operand(i.OutputRegister(0))); \
__ mov(i.TempRegister(2), i.InputRegister(3)); \
__ store_conditional(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
__ BranchShort(&compareExchange, eq, i.TempRegister(2), \
Operand(zero_reg)); \
__ bind(&exit); \
__ sync(); \
} while (0)

Definition at line 424 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT

#define ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT ( load_linked,
store_conditional,
sign_extend,
size,
representation )
Value:
do { \
Label compareExchange; \
Label exit; \
__ daddu(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
if (representation == 32) { \
__ andi(i.TempRegister(1), i.TempRegister(0), 0x3); \
} else { \
DCHECK_EQ(representation, 64); \
__ andi(i.TempRegister(1), i.TempRegister(0), 0x7); \
} \
__ Dsubu(i.TempRegister(0), i.TempRegister(0), \
Operand(i.TempRegister(1))); \
__ sll(i.TempRegister(1), i.TempRegister(1), 3); \
__ sync(); \
__ bind(&compareExchange); \
__ load_linked(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
__ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
size, sign_extend); \
__ ExtractBits(i.TempRegister(2), i.InputRegister(2), zero_reg, size, \
sign_extend); \
__ BranchShort(&exit, ne, i.TempRegister(2), \
Operand(i.OutputRegister(0))); \
__ InsertBits(i.TempRegister(2), i.InputRegister(3), i.TempRegister(1), \
size); \
__ store_conditional(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
__ BranchShort(&compareExchange, eq, i.TempRegister(2), \
Operand(zero_reg)); \
__ bind(&exit); \
__ sync(); \
} while (0)

Definition at line 443 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_EXCHANGE_INTEGER

#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER ( load_linked,
store_conditional )
Value:
do { \
Label exchange; \
__ sync(); \
__ bind(&exchange); \
__ daddu(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
__ load_linked(i.OutputRegister(0), MemOperand(i.TempRegister(0), 0)); \
__ mov(i.TempRegister(1), i.InputRegister(2)); \
__ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
__ BranchShort(&exchange, eq, i.TempRegister(1), Operand(zero_reg)); \
__ sync(); \
} while (0)

Definition at line 385 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT

#define ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT ( load_linked,
store_conditional,
sign_extend,
size,
representation )
Value:
do { \
Label exchange; \
__ daddu(i.TempRegister(0), i.InputRegister(0), i.InputRegister(1)); \
if (representation == 32) { \
__ andi(i.TempRegister(1), i.TempRegister(0), 0x3); \
} else { \
DCHECK_EQ(representation, 64); \
__ andi(i.TempRegister(1), i.TempRegister(0), 0x7); \
} \
__ Dsubu(i.TempRegister(0), i.TempRegister(0), \
Operand(i.TempRegister(1))); \
__ sll(i.TempRegister(1), i.TempRegister(1), 3); \
__ sync(); \
__ bind(&exchange); \
__ load_linked(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
__ ExtractBits(i.OutputRegister(0), i.TempRegister(2), i.TempRegister(1), \
size, sign_extend); \
__ InsertBits(i.TempRegister(2), i.InputRegister(2), i.TempRegister(1), \
size); \
__ store_conditional(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
__ BranchShort(&exchange, eq, i.TempRegister(2), Operand(zero_reg)); \
__ sync(); \
} while (0)

Definition at line 398 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_LOAD_INTEGER

#define ASSEMBLE_ATOMIC_LOAD_INTEGER ( asm_instr)
Value:
do { \
__ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
__ sync(); \
} while (0)

Definition at line 330 of file code-generator-mips64.cc.

◆ ASSEMBLE_ATOMIC_STORE_INTEGER

#define ASSEMBLE_ATOMIC_STORE_INTEGER ( asm_instr)
Value:
do { \
__ sync(); \
__ asm_instr(i.InputOrZeroRegister(2), i.MemoryOperand()); \
__ sync(); \
} while (0)

Definition at line 336 of file code-generator-mips64.cc.

◆ ASSEMBLE_F64X2_ARITHMETIC_BINOP

#define ASSEMBLE_F64X2_ARITHMETIC_BINOP ( op)
Value:
do { \
__ op(i.OutputSimd128Register(), i.InputSimd128Register(0), \
i.InputSimd128Register(1)); \
} while (0)

Definition at line 497 of file code-generator-mips64.cc.

◆ ASSEMBLE_IEEE754_BINOP

#define ASSEMBLE_IEEE754_BINOP ( name)
Value:
do { \
FrameScope scope(masm(), StackFrame::MANUAL); \
__ PrepareCallCFunction(0, 2, kScratchReg); \
__ MovToFloatParameters(i.InputDoubleRegister(0), \
i.InputDoubleRegister(1)); \
__ CallCFunction(ExternalReference::ieee754_##name##_function(), 0, 2); \
/* Move the result in the double result register. */ \
__ MovFromFloatResult(i.OutputDoubleRegister()); \
} while (0)
kScratchReg
#define kScratchReg
Definition code-generator-ppc.cc:29

Definition at line 476 of file code-generator-mips64.cc.

◆ ASSEMBLE_IEEE754_UNOP

#define ASSEMBLE_IEEE754_UNOP ( name)
Value:
do { \
FrameScope scope(masm(), StackFrame::MANUAL); \
__ PrepareCallCFunction(0, 1, kScratchReg); \
__ MovToFloatParameter(i.InputDoubleRegister(0)); \
__ CallCFunction(ExternalReference::ieee754_##name##_function(), 0, 1); \
/* Move the result in the double result register. */ \
__ MovFromFloatResult(i.OutputDoubleRegister()); \
} while (0)

Definition at line 487 of file code-generator-mips64.cc.

◆ ATOMIC_BINOP_CASE

#define ATOMIC_BINOP_CASE ( op,
inst32,
inst64 )

◆ CREATE_OOL_CLASS

#define CREATE_OOL_CLASS ( ool_name,
tasm_ool_name,
T )
Value:
class ool_name final : public OutOfLineCode { \
public: \
ool_name(CodeGenerator* gen, T dst, T src1, T src2) \
: OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \
\
void Generate() final { __ tasm_ool_name(dst_, src1_, src2_); } \
\
private: \
T const dst_; \
T const src1_; \
T const src2_; \
}
gen
BodyGen * gen
Definition random-module-generation.cc:2362

Definition at line 200 of file code-generator-mips64.cc.

◆ TRACE

#define TRACE ( ...)
Value:
PrintF(__VA_ARGS__)

Definition at line 24 of file code-generator-mips64.cc.

◆ UNSUPPORTED_COND

#define UNSUPPORTED_COND ( opcode,
condition )
Value:
StdoutStream{} << "Unsupported " << #opcode << " condition: \"" << condition \
<< "\""; \
UNIMPLEMENTED();

Definition at line 3865 of file code-generator-mips64.cc.

Variable Documentation

◆ index_

Register const index_
private

Definition at line 188 of file code-generator-mips64.cc.

◆ mode_

RecordWriteMode const mode_
private

Definition at line 192 of file code-generator-mips64.cc.

◆ must_save_lr_

bool must_save_lr_
private

Definition at line 196 of file code-generator-mips64.cc.

◆ object_

Register const object_
private

Definition at line 187 of file code-generator-mips64.cc.

◆ scratch0_

Register const scratch0_
private

Definition at line 190 of file code-generator-mips64.cc.

◆ scratch1_

Register const scratch1_
private

Definition at line 191 of file code-generator-mips64.cc.

◆ value_

Register const value_
private

Definition at line 189 of file code-generator-mips64.cc.

◆ zone_

Zone* zone_
private

Definition at line 197 of file code-generator-mips64.cc.